From 49b823244732e8d3a4b0fe91d0f10625fea34eec Mon Sep 17 00:00:00 2001
From: Jack Koenig
Date: Fri, 19 Mar 2021 13:59:52 -0700
Subject: Legalize neg: -x becomes 0 - x (#2128)

This fixes an error with negating a negative SInt literal and a
[debatable] lint warning in Verilator when negating any value.

This behavior matches that of Chisel (which directly emits the 0 - x
already).---
 src/test/scala/firrtl/testutils/FirrtlSpec.scala | 25 ++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

(limited to 'src/test/scala/firrtl/testutils')

diff --git a/src/test/scala/firrtl/testutils/FirrtlSpec.scala b/src/test/scala/firrtl/testutils/FirrtlSpec.scala
index 63def26a..4dc2d642 100644
--- a/src/test/scala/firrtl/testutils/FirrtlSpec.scala
+++ b/src/test/scala/firrtl/testutils/FirrtlSpec.scala
@@ -4,6 +4,7 @@ package firrtl.testutils
 
 import java.io._
 import java.security.Permission
+import scala.sys.process._
 
 import logger.{LazyLogging, LogLevel, LogLevelAnnotation}
 
@@ -175,6 +176,22 @@ trait FirrtlRunners extends BackendCompilationUtilities {
     compiler.compileAndEmit(CircuitState(circuit, HighForm, annotations), extraCheckTransforms)
   }
 
+  /** Run Verilator lint on some Verilog text
+    *
+    * @param inputVerilog Verilog to pass to `verilator --lint-only`
+    * @return Verilator return 0
+    */
+  def lintVerilog(inputVerilog: String): Unit = {
+    val testDir = createTestDirectory(s"${this.getClass.getSimpleName}_lint")
+    val filename = new File(testDir, "test.v")
+    val w = new FileWriter(filename)
+    w.write(inputVerilog)
+    w.close()
+
+    val cmd = Seq("verilator", "--lint-only", filename.toString)
+    assert(cmd.!(loggingProcessLogger) == 0, "Lint must pass")
+  }
+
   /** Compile a Firrtl file
     *
     * @param prefix is the name of the Firrtl file without path or file extension
@@ -413,6 +430,14 @@ abstract class ExecutionTest(
   }
 }
 
+/** Super class for execution driven Firrtl tests compiled without optimizations */
+abstract class ExecutionTestNoOpt(
+  name:        String,
+  dir:         String,
+  vFiles:      Seq[String] = Seq.empty,
+  annotations: AnnotationSeq = Seq.empty)
+    extends ExecutionTest(name, dir, vFiles, RunFirrtlTransformAnnotation(new MinimumVerilogEmitter) +: annotations)
+
 /** Super class for compilation driven Firrtl tests */
 abstract class CompilationTest(name: String, dir: String) extends FirrtlPropSpec {
   property(s"$name should compile correctly") {
-- 
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