From f07baed2bc46e107250c317f290af48747a98322 Mon Sep 17 00:00:00 2001 From: Adam Izraelevitz Date: Mon, 2 May 2016 14:59:51 -0700 Subject: Restructured Compiler to use Transforms. Added an InlineInstance pass. Transforms are new unit of modularity within the compiler. --- src/test/resources/features/CHIRRTLMems.fir | 34 ----------------------------- src/test/resources/features/ChirrtlMems.fir | 34 +++++++++++++++++++++++++++++ src/test/resources/features/Printf.fir | 4 ++-- 3 files changed, 36 insertions(+), 36 deletions(-) delete mode 100644 src/test/resources/features/CHIRRTLMems.fir create mode 100644 src/test/resources/features/ChirrtlMems.fir (limited to 'src/test/resources') diff --git a/src/test/resources/features/CHIRRTLMems.fir b/src/test/resources/features/CHIRRTLMems.fir deleted file mode 100644 index bd92c872..00000000 --- a/src/test/resources/features/CHIRRTLMems.fir +++ /dev/null @@ -1,34 +0,0 @@ - -circuit ChirrtlMems : - module ChirrtlMems : - input clk : Clock - input reset : UInt<1> - - cmem ram : UInt<32>[16] - node newClock = clk - - wire wen : UInt<1> - wen <= not(reset) ; Don't const prop me! - - reg raddr : UInt<4>, clk with : (reset => (reset, UInt(0))) - raddr <= add(raddr, UInt(1)) - infer mport r = ram[raddr], newClock - - when wen : - node newerClock = clk - reg waddr : UInt<4>, clk with : (reset => (reset, UInt(0))) - waddr <= add(waddr, UInt(1)) - infer mport w = ram[waddr], newerClock - w <= waddr - - when eq(waddr, UInt(0)) : - raddr <= UInt(0) - - when not(reset) : - when gt(waddr, UInt(1)) : - when neq(r, raddr) : - printf(clk, UInt(1), "Assertion failed! r =/= raddr\n") - stop(clk, UInt(1), 1) ; Failure! - when eq(raddr, UInt(15)) : - stop(clk, UInt(1), 0) ; Success! - diff --git a/src/test/resources/features/ChirrtlMems.fir b/src/test/resources/features/ChirrtlMems.fir new file mode 100644 index 00000000..bd92c872 --- /dev/null +++ b/src/test/resources/features/ChirrtlMems.fir @@ -0,0 +1,34 @@ + +circuit ChirrtlMems : + module ChirrtlMems : + input clk : Clock + input reset : UInt<1> + + cmem ram : UInt<32>[16] + node newClock = clk + + wire wen : UInt<1> + wen <= not(reset) ; Don't const prop me! + + reg raddr : UInt<4>, clk with : (reset => (reset, UInt(0))) + raddr <= add(raddr, UInt(1)) + infer mport r = ram[raddr], newClock + + when wen : + node newerClock = clk + reg waddr : UInt<4>, clk with : (reset => (reset, UInt(0))) + waddr <= add(waddr, UInt(1)) + infer mport w = ram[waddr], newerClock + w <= waddr + + when eq(waddr, UInt(0)) : + raddr <= UInt(0) + + when not(reset) : + when gt(waddr, UInt(1)) : + when neq(r, raddr) : + printf(clk, UInt(1), "Assertion failed! r =/= raddr\n") + stop(clk, UInt(1), 1) ; Failure! + when eq(raddr, UInt(15)) : + stop(clk, UInt(1), 0) ; Success! + diff --git a/src/test/resources/features/Printf.fir b/src/test/resources/features/Printf.fir index d0c1c775..6e11c64e 100644 --- a/src/test/resources/features/Printf.fir +++ b/src/test/resources/features/Printf.fir @@ -1,5 +1,5 @@ -circuit Top : - module Top : +circuit Printf : + module Printf : input clk : Clock input reset : UInt<1> -- cgit v1.2.3