From 687f3ddbbcd9217542a4bc0e2c256559d2c67a5b Mon Sep 17 00:00:00 2001 From: Schuyler Eldridge Date: Sat, 1 Aug 2020 13:01:44 -0400 Subject: Error on ExtModules w/ same defname, diff. ports (#1734) * Use signed output in LargeParamExecutionTest Change the Verilog used in LargeParamExecutionTest to match its ExtModule specification. An ExtModule with an SInt port should map to a separate Verilog module with a signed port and this is disjoint from an ExtModule with a UInt port. Signed-off-by: Schuyler Eldridge * Error on ExtModules w/ same defname, diff. ports Adds a high form check to ensure that external modules that have the same defname also have exactly the same ports. Signed-off-by: Schuyler Eldridge Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>--- src/test/resources/blackboxes/LargeParam.v | 7 ++++++- src/test/resources/blackboxes/LargeParamTester.fir | 7 +++---- 2 files changed, 9 insertions(+), 5 deletions(-) (limited to 'src/test/resources') diff --git a/src/test/resources/blackboxes/LargeParam.v b/src/test/resources/blackboxes/LargeParam.v index 84e1a1cf..3a0dcd9e 100644 --- a/src/test/resources/blackboxes/LargeParam.v +++ b/src/test/resources/blackboxes/LargeParam.v @@ -1,7 +1,12 @@ // See LICENSE for license details. -module LargeParam #(parameter DATA=0, WIDTH=1) ( +module LargeParamUnsigned #(parameter DATA=0, WIDTH=1) ( output [WIDTH-1:0] out ); assign out = DATA; endmodule +module LargeParamSigned #(parameter DATA=0, WIDTH=1) ( + output signed [WIDTH-1:0] out +); + assign out = DATA; +endmodule diff --git a/src/test/resources/blackboxes/LargeParamTester.fir b/src/test/resources/blackboxes/LargeParamTester.fir index bb0ebdf5..29027c36 100644 --- a/src/test/resources/blackboxes/LargeParamTester.fir +++ b/src/test/resources/blackboxes/LargeParamTester.fir @@ -3,21 +3,21 @@ circuit LargeParamTester : extmodule LargeParam : output out : UInt<1> - defname = LargeParam + defname = LargeParamUnsigned parameter WIDTH = 1 parameter DATA = 0 extmodule LargeParam_1 : output out : UInt<128> - defname = LargeParam + defname = LargeParamUnsigned parameter WIDTH = 128 parameter DATA = 9223372036854775807000 extmodule LargeParam_2 : output out : SInt<128> - defname = LargeParam + defname = LargeParamSigned parameter WIDTH = 128 parameter DATA = -9223372036854775807000 @@ -40,4 +40,3 @@ circuit LargeParamTester : printf(clock, UInt(1), "Assertion failed\nTest Failed!\n") stop(clock, UInt(1), 1) stop(clock, UInt(1), 0) - -- cgit v1.2.3