From 297fbda180584cc3456145faecdc40418babeef1 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 31 Oct 2018 09:21:05 -0700
Subject: Don't include verilog header files in "FileList" for VCS/Verilator.
 (#918)

When constructing the black box helper file list (firrtl_black_box_resource_files.f), filter out Verilog header files (*.vh) - Fixes #917---
 src/test/resources/blackboxes/VerilogHeaderFile.vh | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 src/test/resources/blackboxes/VerilogHeaderFile.vh

(limited to 'src/test/resources/blackboxes/VerilogHeaderFile.vh')

diff --git a/src/test/resources/blackboxes/VerilogHeaderFile.vh b/src/test/resources/blackboxes/VerilogHeaderFile.vh
new file mode 100644
index 00000000..0844c95f
--- /dev/null
+++ b/src/test/resources/blackboxes/VerilogHeaderFile.vh
@@ -0,0 +1,5 @@
+// See LICENSE for license details.
+`ifndef _parameters_vh_
+`define _parameters_vh_
+parameter VALUE = 2;
+`endif
-- 
cgit v1.2.3