From 4c3b4f4dc10c380a101df75cb561e3f79f1a6abe Mon Sep 17 00:00:00 2001 From: jackkoenig Date: Fri, 23 Sep 2016 13:44:57 -0700 Subject: Add RawString ExtModule parameter support While unsafe, this supports Verilog parameter types. Tests now require Verilator 3.884+ to pass. --- src/test/resources/blackboxes/ParameterizedExtModuleTester.fir | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/test/resources/blackboxes/ParameterizedExtModuleTester.fir') diff --git a/src/test/resources/blackboxes/ParameterizedExtModuleTester.fir b/src/test/resources/blackboxes/ParameterizedExtModuleTester.fir index 29769e84..e360e4cf 100644 --- a/src/test/resources/blackboxes/ParameterizedExtModuleTester.fir +++ b/src/test/resources/blackboxes/ParameterizedExtModuleTester.fir @@ -7,6 +7,7 @@ circuit ParameterizedExtModuleTester : parameter VALUE = 1 parameter STRING = "one" parameter REAL = -1.7 + parameter TYP = 'bit' extmodule ParameterizedExtModule_2 : input foo : UInt<16> @@ -16,6 +17,7 @@ circuit ParameterizedExtModuleTester : parameter VALUE = 2 parameter STRING = "two" parameter REAL = 2.6E50 + parameter TYP = 'bit [1:0]' module ParameterizedExtModuleTester : input clk : Clock @@ -32,7 +34,7 @@ circuit ParameterizedExtModuleTester : printf(clk, not(reset), "Assertion failed\nTest Failed!\n") stop(clk, not(reset), 1) else : - when neq(dut2.bar, UInt(1006)) : + when neq(dut2.bar, UInt(1008)) : printf(clk, not(reset), "Assertion failed\nTest Failed!\n") stop(clk, not(reset), 1) else : -- cgit v1.2.3