From 73868fc6e8110282ce545c296540d3ebbafadfeb Mon Sep 17 00:00:00 2001
From: Jack Koenig
Date: Fri, 21 Aug 2020 11:27:50 -0700
Subject: Fix Uniquify bug and improve ReplaceSeqMems transforms (#1855)

* Fix bug in Uniquify clobbering DefInstance types

* Change ReplaceMemTransform to not run Uniquify nor fixups

Use invalidation as mechanism for rerunning resolution passes---
 src/main/scala/firrtl/passes/Uniquify.scala                 |  2 +-
 .../scala/firrtl/passes/memlib/ReplaceMemTransform.scala    | 13 +++++--------
 2 files changed, 6 insertions(+), 9 deletions(-)

(limited to 'src/main')

diff --git a/src/main/scala/firrtl/passes/Uniquify.scala b/src/main/scala/firrtl/passes/Uniquify.scala
index 10198b33..bc48ebbc 100644
--- a/src/main/scala/firrtl/passes/Uniquify.scala
+++ b/src/main/scala/firrtl/passes/Uniquify.scala
@@ -329,7 +329,7 @@ object Uniquify extends Transform with DependencyAPIMigration {
             sinfo = sx.info
             if (nameMap.contains(sx.name)) {
               val node = nameMap(sx.name)
-              val newType = portTypeMap(m.name)
+              val newType = portTypeMap(sx.module)
               (Utils.create_exps(sx.name, sx.tpe).zip(Utils.create_exps(node.name, newType))).foreach {
                 case (from, to) => renames.rename(from.serialize, to.serialize)
               }
diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala
index 79e07640..c88d6ba7 100644
--- a/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala
+++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala
@@ -116,7 +116,10 @@ class ReplSeqMem extends Transform with HasShellOptions with DependencyAPIMigrat
   override def prerequisites = Forms.MidForm
   override def optionalPrerequisites = Seq.empty
   override def optionalPrerequisiteOf = Forms.MidEmitters
-  override def invalidates(a: Transform) = false
+  override def invalidates(a: Transform) = a match {
+    case InferTypes | ResolveKinds | ResolveFlows | LowerTypes => true
+    case _                                                     => false
+  }
 
   val options = Seq(
     new ShellOption[String](
@@ -138,13 +141,7 @@ class ReplSeqMem extends Transform with HasShellOptions with DependencyAPIMigrat
       new ResolveMemoryReference,
       new CreateMemoryAnnotations(inConfigFile),
       new ReplaceMemMacros(outConfigFile),
-      new WiringTransform,
-      new SimpleMidTransform(RemoveEmpty),
-      new SimpleMidTransform(CheckInitialization),
-      new SimpleMidTransform(InferTypes),
-      Uniquify,
-      new SimpleMidTransform(ResolveKinds),
-      new SimpleMidTransform(ResolveFlows)
+      new WiringTransform
     )
 
   def execute(state: CircuitState): CircuitState = {
-- 
cgit v1.2.3