From 5e23294dc6ac3c1937c9f071f970178c9f724037 Mon Sep 17 00:00:00 2001 From: Jack Koenig Date: Fri, 29 Sep 2017 15:43:15 -0700 Subject: StringLit.verilogEscape should support all printable ASCII chars (#668) Defined as the range from ' ' to '~' [0x20, 0x7e]--- src/main/scala/firrtl/ir/IR.scala | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/main') diff --git a/src/main/scala/firrtl/ir/IR.scala b/src/main/scala/firrtl/ir/IR.scala index 2f37b05a..f2c39f8d 100644 --- a/src/main/scala/firrtl/ir/IR.scala +++ b/src/main/scala/firrtl/ir/IR.scala @@ -69,12 +69,12 @@ object StringLit { /** Maps characters to ASCII for Verilog emission */ private def toASCII(char: Char): List[Char] = char match { case nonASCII if !nonASCII.isValidByte => List('?') - case letter if letter.isLetter => List(letter) - case '\n' => List('\\', 'n') + case '"' => List('\\', '"') case '\\' => List('\\', '\\') + case c if c >= ' ' && c <= '~' => List(c) + case '\n' => List('\\', 'n') case '\t' => List('\\', 't') - case '"' => List('\\', '"') - case other => List('?') + case _ => List('?') } /** Create a StringLit from a raw parsed String */ -- cgit v1.2.3