From 3655ae091249a72bd424073cfb4a382a5ab170c6 Mon Sep 17 00:00:00 2001
From: Paul Rigge
Date: Tue, 18 Dec 2018 15:47:20 -0800
Subject: Give better error when mport references non-existant memory. (#975)

* Give better error when mport references non-existent memory
* Closes #796---
 src/main/scala/firrtl/passes/RemoveCHIRRTL.scala | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'src/main')

diff --git a/src/main/scala/firrtl/passes/RemoveCHIRRTL.scala b/src/main/scala/firrtl/passes/RemoveCHIRRTL.scala
index cc69be6f..5a9a60f8 100644
--- a/src/main/scala/firrtl/passes/RemoveCHIRRTL.scala
+++ b/src/main/scala/firrtl/passes/RemoveCHIRRTL.scala
@@ -103,7 +103,11 @@ object RemoveCHIRRTL extends Transform {
                   rds map (_.name), wrs map (_.name), rws map (_.name))
       Block(mem +: stmts)
     case sx: CDefMPort =>
-      types(sx.name) = types(sx.mem)
+      types.get(sx.mem) match {
+        case Some(mem) => types(sx.name) = mem
+        case None =>
+          throw new PassException(s"Undefined memory ${sx.mem} referenced by mport ${sx.name}")
+      }
       val addrs = ArrayBuffer[String]()
       val clks = ArrayBuffer[String]()
       val ens = ArrayBuffer[String]()
-- 
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