From 2440b824c68e4604d174e92e26af2c3eca1ec171 Mon Sep 17 00:00:00 2001 From: azidar Date: Thu, 30 Jul 2015 18:26:40 -0700 Subject: Added module name to error messages. --- src/main/stanza/passes.stanza | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/main/stanza/passes.stanza') diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index d84b08a5..d5034f8a 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -1611,8 +1611,8 @@ public defn expand-whens (c:Circuit) -> Circuit : ;for x in resets do : println-debug(x) val table = merge-resets(assign,resets,rsignals) - println("====== Table ======") - for x in table do : println(x) + ;println-debug("====== Table ======") + ;for x in table do : println-debug(x) val decs = Vector() val cons = Vector() @@ -1626,7 +1626,6 @@ public defn expand-whens (c:Circuit) -> Circuit : referenced?[key(x)] = true for x in decs do : mark-referenced(referenced?,x) - println-all(["Referenced \n" referenced?]) val decs* = Vector() for x in decs do : if is-referenced?(referenced?,x) : add(decs*,x) -- cgit v1.2.3