From 0c7aca561aef907314b0d9c9737fcea04ae6ce82 Mon Sep 17 00:00:00 2001 From: Adam Izraelevitz Date: Tue, 28 Jul 2015 13:29:55 -0700 Subject: Integrated bigint. Mostly works, but getting "cast" error for make Test. --- src/main/stanza/errors.stanza | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/main/stanza/errors.stanza') diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza index d8969dd3..80ad3e56 100644 --- a/src/main/stanza/errors.stanza +++ b/src/main/stanza/errors.stanza @@ -6,6 +6,7 @@ defpackage firrtl/errors : import firrtl/primops import firrtl/passes import firrtl-main + import bigint ; TODO ; make sure it compiles, write tests, look over code to make sure its right @@ -277,7 +278,7 @@ public defn check-high-form (c:Circuit) -> Circuit : (e) : add(errors,InvalidIndex(info)) (e:DoPrim) : check-high-form-primop(e,errors,info) (e:UIntValue) : - if value(e) < to-long $ 0 : add(errors,NegUInt(info)) + if value(e) < BigIntLit("0") : add(errors,NegUInt(info)) (e) : false map(check-high-form-w{info,_:Width},e) map(check-high-form-t{info,_:Type},e) -- cgit v1.2.3 From 7646c2e3edf90ea13a83b76c97f35877263c5e63 Mon Sep 17 00:00:00 2001 From: Adam Izraelevitz Date: Wed, 29 Jul 2015 15:00:37 -0700 Subject: Finished supporting Chisel 2.0 Ref Chip --- src/main/stanza/errors.stanza | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/main/stanza/errors.stanza') diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza index 80ad3e56..6cdd1dca 100644 --- a/src/main/stanza/errors.stanza +++ b/src/main/stanza/errors.stanza @@ -278,7 +278,7 @@ public defn check-high-form (c:Circuit) -> Circuit : (e) : add(errors,InvalidIndex(info)) (e:DoPrim) : check-high-form-primop(e,errors,info) (e:UIntValue) : - if value(e) < BigIntLit("0") : add(errors,NegUInt(info)) + if value(e) < BigIntLit("h0",length(value(e))) : add(errors,NegUInt(info)) (e) : false map(check-high-form-w{info,_:Width},e) map(check-high-form-t{info,_:Type},e) -- cgit v1.2.3