From 088c82244d58d7e5c8a6ad6e7e3bb1edaf81af3a Mon Sep 17 00:00:00 2001 From: Albert Magyar Date: Tue, 9 Mar 2021 23:15:29 -0800 Subject: Specify that SimplifyMems invalidates InferTypes --- src/main/scala/firrtl/transforms/SimplifyMems.scala | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/main/scala/firrtl/transforms') diff --git a/src/main/scala/firrtl/transforms/SimplifyMems.scala b/src/main/scala/firrtl/transforms/SimplifyMems.scala index 8ecc484a..81c40dd4 100644 --- a/src/main/scala/firrtl/transforms/SimplifyMems.scala +++ b/src/main/scala/firrtl/transforms/SimplifyMems.scala @@ -23,7 +23,10 @@ class SimplifyMems extends Transform with DependencyAPIMigration { override def prerequisites = Forms.MidForm override def optionalPrerequisites = Seq.empty override def optionalPrerequisiteOf = Forms.MidEmitters - override def invalidates(a: Transform) = false + override def invalidates(a: Transform) = a match { + case InferTypes => true + case _ => false + } def onModule(c: Circuit, renames: RenameMap)(m: DefModule): DefModule = { val moduleNS = Namespace(m) -- cgit v1.2.3 From 1afa3b40f78d781ca1f242b49ca3a56d6cbc57e4 Mon Sep 17 00:00:00 2001 From: Albert Magyar Date: Mon, 5 Apr 2021 12:18:49 -0700 Subject: Establish a fixed relative order for FPGA-backed passes + reflect in ScalaDoc --- src/main/scala/firrtl/transforms/SimplifyMems.scala | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/main/scala/firrtl/transforms') diff --git a/src/main/scala/firrtl/transforms/SimplifyMems.scala b/src/main/scala/firrtl/transforms/SimplifyMems.scala index 81c40dd4..92e19f7e 100644 --- a/src/main/scala/firrtl/transforms/SimplifyMems.scala +++ b/src/main/scala/firrtl/transforms/SimplifyMems.scala @@ -6,6 +6,7 @@ package transforms import firrtl.ir._ import firrtl.Mappers._ import firrtl.annotations._ +import firrtl.options.Dependency import firrtl.passes._ import firrtl.passes.memlib._ import firrtl.stage.Forms @@ -21,7 +22,7 @@ import ResolveMaskGranularity._ class SimplifyMems extends Transform with DependencyAPIMigration { override def prerequisites = Forms.MidForm - override def optionalPrerequisites = Seq.empty + override def optionalPrerequisites = Seq(Dependency[InferReadWrite]) override def optionalPrerequisiteOf = Forms.MidEmitters override def invalidates(a: Transform) = a match { case InferTypes => true -- cgit v1.2.3