From 6ea4ac666e4ce8dfaca1545660f372fccff610f5 Mon Sep 17 00:00:00 2001
From: Adam Izraelevitz
Date: Wed, 21 Mar 2018 14:24:25 -0700
Subject: GroupModule Transform (#766)

* Added grouping pass

* Added InfoMagnet and infomappers

* Changed return type of execute to allow final CircuitState inspection

* Updated dedup. Now is name-agnostic

* Added GroupAndDedup transform---
 src/main/scala/firrtl/passes/memlib/MemIR.scala | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/main/scala/firrtl/passes')

diff --git a/src/main/scala/firrtl/passes/memlib/MemIR.scala b/src/main/scala/firrtl/passes/memlib/MemIR.scala
index 54441481..5fb837c1 100644
--- a/src/main/scala/firrtl/passes/memlib/MemIR.scala
+++ b/src/main/scala/firrtl/passes/memlib/MemIR.scala
@@ -30,4 +30,5 @@ case class DefAnnotatedMemory(
   def toMem = DefMemory(info, name, dataType, depth,
     writeLatency, readLatency, readers, writers,
     readwriters, readUnderWrite)
+  def mapInfo(f: Info => Info): Statement = this.copy(info = f(info))
 }
-- 
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