From abf226471249a1cbb8de33d0c4bc8526f9aafa70 Mon Sep 17 00:00:00 2001 From: Schuyler Eldridge Date: Tue, 17 Dec 2019 18:29:47 -0500 Subject: Migrate to DependencyAPI Co-authored-by: Schuyler Eldridge Co-authored-by: Albert Magyar Signed-off-by: Schuyler Eldridge --- src/main/scala/firrtl/passes/CheckWidths.scala | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src/main/scala/firrtl/passes/CheckWidths.scala') diff --git a/src/main/scala/firrtl/passes/CheckWidths.scala b/src/main/scala/firrtl/passes/CheckWidths.scala index 6ceac032..b750196a 100644 --- a/src/main/scala/firrtl/passes/CheckWidths.scala +++ b/src/main/scala/firrtl/passes/CheckWidths.scala @@ -9,8 +9,14 @@ import firrtl.traversals.Foreachers._ import firrtl.Utils._ import firrtl.constraint.IsKnown import firrtl.annotations.{CircuitTarget, ModuleTarget, Target, TargetToken} +import firrtl.options.{Dependency, PreservesAll} + +object CheckWidths extends Pass with PreservesAll[Transform] { + + override val prerequisites = Dependency[passes.InferWidths] +: firrtl.stage.Forms.WorkingIR + + override val dependents = Seq(Dependency[transforms.InferResets]) -object CheckWidths extends Pass { /** The maximum allowed width for any circuit element */ val MaxWidth = 1000000 val DshlMaxWidth = getUIntWidth(MaxWidth) -- cgit v1.2.3