From bae6ba5d2405ba1caf7400f15d8875d4a79b8bae Mon Sep 17 00:00:00 2001
From: azidar
Date: Mon, 8 Feb 2016 14:55:21 -0800
Subject: More bug fixes

---
 src/main/scala/firrtl/Compiler.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/main/scala/firrtl/Compiler.scala')

diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala
index d2f9fc0e..2998232f 100644
--- a/src/main/scala/firrtl/Compiler.scala
+++ b/src/main/scala/firrtl/Compiler.scala
@@ -22,7 +22,7 @@ object VerilogCompiler extends Compiler {
   // Copied from Stanza implementation
   val passes = Seq(
     //CheckHighForm,          
-    FromCHIRRTL,
+    //FromCHIRRTL,
     ToWorkingIR,            
     ResolveKinds,
     InferTypes,
-- 
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