From dbd3a844953fb8630f8b2ca5706c764533b661b0 Mon Sep 17 00:00:00 2001
From: azidar
Date: Wed, 11 Mar 2015 20:21:08 -0700
Subject: Finished expand accessors pass. Fixed bug in resolve-gender. Added
 tests, all pass. Minimal removal of letrec to get WritePort to work correctly
 - a more thorough removeal is still needed

---
 notes/notes.03.10.15.txt | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 notes/notes.03.10.15.txt

(limited to 'notes')

diff --git a/notes/notes.03.10.15.txt b/notes/notes.03.10.15.txt
new file mode 100644
index 00000000..dee8a537
--- /dev/null
+++ b/notes/notes.03.10.15.txt
@@ -0,0 +1,33 @@
+Lower to ground types
+
+simple declarations:
+  wire w : UInt[3]
+  ==>
+  wire temp1 : UInt
+  wire temp2 : UInt
+  wire temp3 : UInt
+
+  reg r : UInt[3] ;TODO
+
+bundle declarations:
+  wire w : {male data:SInt, female ready:UInt}
+  wire temp1 : SInt
+  wire temp2 : UInt
+
+other
+  wire w : {male data : SInt[3], female ready : UInt}
+  wire temp1 : SInt
+  wire temp2 : SInt
+  wire temp3 : SInt
+  wire temp4 : UInt
+
+ports:
+  input a : {m: data, m:valid, f:rdy}
+  ==>
+  input a1
+  input a2
+  output a3
+
+mem m : {m, 
+
+key function: expand-exp(e:Expression) -> List<[Expression,Gender]>
-- 
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