From 3e6d0e2b290aeb49aa9085b75b8a6c57fe1af28c Mon Sep 17 00:00:00 2001 From: azidar Date: Mon, 23 Mar 2015 16:12:38 -0700 Subject: Finished first two parts of expand-whens pass. Fixed inits by adding WRegInit and removing Null and initialize-register pass --- TODO | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'TODO') diff --git a/TODO b/TODO index 7ae833a5..0c7874be 100644 --- a/TODO +++ b/TODO @@ -1,5 +1,8 @@ - TODO + when calculating writeenables, use assignment + when calculating read enables, scan list + change parser to use <> syntax (and update all tests) + Figure out how widths propogate for all updated primops (Adam) Remove letrec. Add to expressions: Register(input,en), ReadPort(mem,index,enable), WritePort(mem,index,enable) (Patrick) Add bit-reduce-and etc to primops (Jonathan) @@ -26,6 +29,9 @@ TODO What is lowered form? What is it for? +Checks: + Subfields are only on bundles, before type inference + after adding dynamic assertions, insert bounds check with accessor expansion Tests: Error if declare anything other than module in circuit -- cgit v1.2.3