From 887d785ecc2ba7c363194cef89b72bc026c81cf9 Mon Sep 17 00:00:00 2001 From: azidar Date: Wed, 3 Jun 2015 20:39:41 -0700 Subject: Fixed verilog backend bugs. Passes ALU. Fails Datapath --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 1bacf104..9679422e 100644 --- a/Makefile +++ b/Makefile @@ -46,7 +46,7 @@ riscv: cd $(test_dir)/riscv-mini && lit -v . --path=$(root_dir)/utils/bin/ push: - scp test/riscv-mini/*.v adamiz@a5:/scratch/adamiz/firrtl-all/riscv-mini/generated-src + scp test/chisel3/*.v adamiz@a5:/scratch/adamiz/firrtl-all/riscv-mini/generated-fir-src done: say "done" -- cgit v1.2.3