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2020-11-16make LazyLogging log to console by default. (#1961)Jiuyang Liu
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-11-12Fix RemoveWires handling of invalidated non-UInt wires (#1949)Jack Koenig
It would replace them with a validif node with a UIntLiteral which can lead to type errors.
2020-11-11smt: add support for write-first memories (#1948)Kevin Laeufer
2020-11-10Fix SMT Memory Bug (#1942)Kevin Laeufer
* smt: add test for write port collision * smt: add missing call to insertDummyAssignsForMemoryOutputs * smt: fix typo in write port code Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-11-10Refactor emiter (#1879)Jiuyang Liu
* split big Emitter to submodules. * fix all deprecated warning. Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-11-09smt: ensure that all signals have a unique name (#1943)Kevin Laeufer
* smt: add tests for assert name clashes * smt: ensure unique signal names with a namespace this fixes issues #1934
2020-11-07-full64 is required to detect VCS. (#1930)Jiuyang Liu
2020-11-04Remove caching from RenameMap (#1938)Jack Koenig
2020-10-26fix for LoweringCompilersSpec.Jiuyang liu
2020-10-26bug fix for VerilogPrep using wrong type.Jiuyang liu
2020-10-26fix a test not detecting verilog name conflicts.Jiuyang liu
2020-10-13Make {Stage, FirrtlStage}.run protected (#1926)Schuyler Eldridge
* Make Stage.run protected Change the access modifier of Stage.run from no modifier to protected. This method is really an internal API that the user implements with the main entry point for a Stage being "execute" or "transform". By allowing users to access "run" they can bypass checks, mandatory file reads/writes, and wrappers. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com> * Make FirrtlStage.run protected Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
2020-10-01Fix "fix" for negative literals > 32 bitsJack Koenig
Overflow of 32-bit Int would cause any negative literal value equal to -(2^(width % 32 - 1)) where width >= 32 to be incorrectly inverted
2020-09-30Add test for chaining RW-port rdata as wdata of another memAlbert Magyar
* Also clean up VerilogMemDelaySpec structure
2020-09-30Handle case where rdata of mem RW port split to R+W ports drives another memAlbert Magyar
2020-09-30Speed up writing CustomFileEmission with buffering (#1906)Jack Koenig
Also speed up common case of Array[Byte]
2020-09-16Change to Apache 2.0 License (#1901)Chick Markley
2020-09-15Don't use ResolvedAnnotationPaths in ConstProp nor DCE (#1896)Jack Koenig
Both use EliminateTargetPaths to duplicate modules based on annotations. Currently, EliminateTargetPaths API is a little too limited so it duplicates more than it should which effectively breaks Dedup whenever DontTouchAnnotations are present. Also, make ConstProp and DCE treat all HasDontTouches as local annotations even if they are instance annotations. This is more conservative but it is generally better to preserve deduplication than to maximally optimize every instance. Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-09-14Hit connect case in DedupModuleTests (#1716)Schuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-09-09Make StageOption Unserializable (#1891)Jack Koenig
These options are generally specific to a stage and thus should not be propagating across serialization
2020-09-09Loosen inlining restrictions (#1882)Albert Chen
* test multiinfo comparison and mux cond inlining * loosen inlining conditions * fix typo * include dshlw * fix test
2020-09-06Add --pretty:no-expr-inlining to prevent expression inlining (#1869)Jack Koenig
Also rename --Wno-scala-version-warning to --warn:no-scala-version-deprecation and adopt naming convention where resulting annotation matches the CLI option
2020-09-06Support binary files in CustomFileEmission (#1887)Jack Koenig
2020-09-05Better error messages for unserializable annotations (#1885)Jack Koenig
2020-09-04Add test for mem port clock legalizationAlbert Magyar
2020-09-04Legalize memory port clocksAlbert Magyar
2020-09-01InlineBooleanExpressions: test DontTouch (#1880)Albert Chen
* InlineBooleanExpressions: test DontTouch * run scalafmt
2020-08-31Emitter: add missing parenthesize calls (#1874)Albert Chen
2020-08-28Add test for InlineBooleanExpressions add-not exampleAlbert Magyar
2020-08-28Restrict boolean inlining to avoid context-sensitive width bugsAlbert Magyar
* Restore depth-agnostic inlining for simple 'lhs = ref' bool assignments * Address review comments * Run scalafmt
2020-08-28Add custom transforms 'upstream' of emitter annotation in equiv testsAlbert Magyar
2020-08-28FlattenSpec: flattening a module with no instaces should be a no-op (#1868)Kevin Laeufer
* FlattenSpec: flattening a module with no instaces should be a no-op * Fix problem when flattening/inlining a lone module Fix an edge case bug in InlineInstances where a circuit containing a lone module is flattened/inlined. This now properly special cases the situation of an empty indexMap which before had to be of length >= 1. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Simplify rename logic in InlineInstances Co-authored-by: Jack Koenig <koenig@sifive.com> Co-authored-by: Albert Magyar <albert.magyar@gmail.com> Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Mea culpa Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: Jack Koenig <koenig@sifive.com> Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
2020-08-28Deprecate CompilerAnnotation (#1870)Schuyler Eldridge
* CompilerAnnotation$ emits RunFirrtlTransform Change the CompilerAnnotation object to emit RunFirrtlTransformAnnotations containing the associated emitter. This requires a fix in the Driver compatibility layer to know how to enable one-file-per module emission if either a CompilerAnnotation or a RunFirrtlTransformAnnotation(_: Emitter) is present. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Add ConvertCompilerAnnotation phase Add a phase, ConvertCompilerAnnotation, that converts a CompilerAnnotation to a RunFirrtlTransformAnnotation. This provides a warning to the user if this path is taken. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Add test of ConvertCompilerAnnotation Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Deprecate CompilerAnnotation$, move helper methods Deprecate the CompilerAnnotation companion object and move it's private utility inside the RunFirrtlTransformAnnotation companion object. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Make ConvertCompilerAnnotations private[firrtl] Make this phase private to avoid adding a deprecation warning. Also, remove an unused string value. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Fix incorrect string in test Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Add test that '-X verilog', no emitter yields file Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-08-26smt: ignore clock signals when converting to transition system (#1866)Kevin Laeufer
If there is more than one clock, this will be detected and the user will be promted to run the StutteringClock transform.
2020-08-26Scalafmt check all (#1867)Kevin Laeufer
* run scalafmtAll * ci: scalafmtCheckAll to check all code instead of just the main sources
2020-08-26Emit parentheses in Verilog for nested unary ops (#1865)Jack Koenig
2020-08-25Inline Boolean Expressions (#1817)Albert Chen
The following conditions must be satisfied to inline: 1. has type Utils.BoolType 2. is bound to a DefNode with name starting with '_' 3. is bound to a DefNode with a source locator that points at the same file and line number. If it is a MultiInfo source locator, the set of file and line number pairs must be the same. Source locators may point to different column numbers. 4. InlineBooleanExpressionsMax has not been exceeded 5. is not a Mux Also updates the Verilog emitter to break up lines greater than 120 characters
2020-08-24Make ir.Serializer support custom FirrtlNodes (#1857)Jack Koenig
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-08-22Async reset tieoff bug (#1854)David Biancolin
* Elide emission of literals for async reset in sensitivity lists * Deprecate LegalizeClocksTransform Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-08-21Deprecate Uniquify and move its useful utilities (#1856)Jack Koenig
2020-08-21Fix Uniquify bug and improve ReplaceSeqMems transforms (#1855)Jack Koenig
* Fix bug in Uniquify clobbering DefInstance types * Change ReplaceMemTransform to not run Uniquify nor fixups Use invalidation as mechanism for rerunning resolution passes
2020-08-14Apply scalafmt againJack Koenig
2020-08-14All of src/ formatted with scalafmtchick
2020-08-14Tell Scalafmt to ignore large literal collectionsJack Koenig
2020-08-15experimental SMTLib and btor2 emitter (#1826)Kevin Laeufer
This adds an experimental new SMTLib and Btor2 emitter that converts a firrtl module into a format suitable for open source model checkers. The format generally follows the behavior of yosys' write_smt2 and write_btor commands. To generate btor2 for the module in m.fir run > ./utils/bin/firrtl -i m.fir -E experimental-btor2 for SMT: > ./utils/bin/firrtl -i m.fir -E experimental-smt2 If you have a design with multiple clocks or an asynchronous reset, try out the new StutteringClockTransform. You can designate any input of type Clock to be your global simulation clock using the new GlobalClockAnnotation. If your toplevel module instantiates submodules, you need to inline them if you want the submodule logic to be included in the formal model.
2020-08-14tests: Decrease Dependency on Deprecated APIs (#1839)Kevin Laeufer
* test: add LeanTransformSpec to replace the old SimpleTransformSpec SimpleTransformSpec isn't simple anymore! * AnnotationTests: remove deprecated Compiler code * LeanTransformSpec: implicitly add right EmitCircuitAnnotation * AsyncResetSpec: move to new lean spec * CheckCombLoopsSpec: remove deprecated Compiler code * ChirrtlMemSpec: remove deprecated compiler code * CompilerTest: remove use of deprecated Compiler API
2020-08-13Deprecate support for Scala 2.11 (#1842)Jack Koenig
* Deprecate support for Scala 2.11 Printed as warning in transform, can be suppressed via CLI * Place version deprecation message in object Refactor CheckScalaVersion to place the deprecation message inside the companion object. This lets the object be reused in other places, like in tests. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Check Scala 2.11 deprecation messages in tests Fix FirrtlMainSpec to check that the Scala 2.11 deprecation message added by the CheckScalaVersion transform shows up on stdout, but only if tests are running under 2.11. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-08-13Remove LegacyAnnotation and [most] MoultingYaml (#1833)Jack Koenig
* Remove LegacyAnnotation and MoultingYaml It has been deprecated since 1.1 * Remove all uses of ConvertLegacyAnnotations Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-08-13Cleanup Named Targets (#1311)Schuyler Eldridge
* Add CleanupNamedTargets Transform Adds a new transform, CleanupNamedTargets, that will convert ReferenceTargets to InstanceTargets if any ReferenceTargets are found to be actually pointing at instances. This fixes an issue where a ComponentName pointing at an instance will be converted to a ReferenceTarget. Later on, this ReferenceTarget will not be properly renamed by other transforms, e.g., EliminateTargetPaths. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Update ScalaTests Co-authored-by: Jack Koenig <koenig@sifive.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-08-12Combined Uniquify and LowerTypes pass (#1784)Kevin Laeufer
* Utils: add to_dir helper function * firrt.SymbolTable trait for scanning declarations * ir: RefLikeExpression trait to represent SubField, SubIndex, SubAccess and Reference nodes * add new implementation of the LowerTypes pass * replace LowerTypes with NewLowerTypes * remove dependencies on Uniquify * GroupComponentSpec: GroupComponents is run before lower types * NewLowerTypes: address Adam's suggestions * LoweringCompilerSpec: Uniquify was removed and NewLowerTypes * LowerTypesSpec: add newline at the end of file * LowerTypesSpec: port Uniquify tests to combined pass * NewLowerTypes: ensure that internal methods are not visible * NewLowerTypes: extend DependencyAPIMigration * NewLowerTypes: lower ports without looking at the body * LowerTypesSpec: use TransformManager instead of hard coded passes. * NewLowerTypes: names are already assumed to be part of the namespace * LowerTypesSpec: test name clashes between ports and nodes, inst, mem * NewLowerTypes: correctly rename nodes, mems and instances that clash with port names * NewLowerTypes: Iterable[String] instead of Seq[String] for 2.13 * NewLowerTypes: add a fast path for ground types without renaming * LowerTypesSpec: remove trailing commans for 2.11 * LowerTypesSpec: explain why there are two * Uniquify: use loweredName from NewLowerType * replace old LowerTypes pass with NewLowerTypes pass * Uniquify: deprecate pass usage There are some functions that are still used by other passes. * LowerTypes: InstanceKeyGraph now has a private constructor * LowerTypes: remove remaining references to NewLowerTypes * LoweringCompilerSpec: fix transform order to LowerTypes * SymbolTable: add improvements from PR * LoweringCompilerSpec: ignore failing CustomTransform tests
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