| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2015-12-11 | Added LoFirrtl compiler, can be called with -X lofirrtl | azidar | |
| 2015-12-08 | Refactored MIDAS code into its own repo | jackkoenig | |
| 2015-12-07 | Fixed bug, I think transformation works now for the most part | jackkoenig | |
| 2015-12-07 | The transformation works! Kind of, it works fine when everything is alwasy ↵ | jackkoenig | |
| ready, has some weird issues when they're not, but also kind of works in that the hardware verifier still reports the right answer, it seems to go to half duty cycle and then do every token twice | |||
| 2015-12-06 | Working on generating SimTop, need to figure out how to split the top-level ↵ | jackkoenig | |
| IO between the sim modules. | |||
| 2015-12-04 | Everything is broken, need Translator to work on files without a circuit, ↵ | jackkoenig | |
| need to parse queue module text in midas/Utils.scala, need to create (src, dst) -> Module mapping in midas/Fame.scala | |||
| 2015-12-03 | Some stylistic changes and a couple bugfixes to simulation wrapper generation | jackkoenig | |
| 2015-12-03 | New wrapper generator complete | jackkoenig | |
| 2015-12-03 | Changing simwrapper to group ports that go to different places, not quite ↵ | jackkoenig | |
| there yet. Will allow simple bulk connecting at top-level | |||
| 2015-12-03 | Seem to be able to generate simulation wrapper module from DefInst | jackkoenig | |
| 2015-12-02 | Added fame transformation and new package, making progress | jackkoenig | |
| 2015-11-24 | In process of adding FAME-1 transformation, updated todos in grammar file, ↵ | jackkoenig | |
| updated Makefile to play nicer when firrtl is a submodule, fixed bug in Translator for single line scopes, fixed firrtl-scala script to point to firrtl.Driver instead of old firrtl.Test | |||
| 2015-11-23 | Rename Test.scala to Driver.scala | jackkoenig | |
| 2015-11-02 | Deleted extranous passes.stanza comments, updated standard passes. Added ↵ | jackkoenig | |
| support for -b <backend> flag without any other specified passes in stanza, updated parser tests to work with stanza implementation. | |||
| 2015-10-30 | Added support for -b <backend> so that specific passes can be run then a ↵ | jackkoenig | |
| backend can be applied. Added firrtl compiler for emitting firrtl | |||
| 2015-10-19 | Merge pull request #47 from jackkoenig/master | Adam Izraelevitz | |
| Updated Scala FIRRTL with Testing and Infer-Types Pass | |||
| 2015-10-15 | Reorganized Primops (renamed from PrimOps), added maps and functions to ↵ | Jack | |
| convert object <=> string, added eqv and neqv | |||
| 2015-10-15 | Added infer-types pass, seems to work. Added infer-types error checking, ↵ | Jack | |
| modified Logger slightly, added Primops object for utility functions, minor changes in Utils | |||
| 2015-10-14 | Modified getType to return Type rather than Option[Type] which makes more ↵ | Jack | |
| sense for some applications, also fixed up printing to better match stanza implementation | |||
| 2015-10-14 | Moved Logger to new private object DebugUtils, changed UInt/SInt value ↵ | Jack | |
| printing to match stanza implementation | |||
| 2015-10-14 | Don't emit SystemVerilog keywords | Andrew Waterman | |
| 2015-10-12 | Added initial support for debug printing for lit based testing, most types ↵ | Jack | |
| of printVars still missing. Added Logger class for debug printing | |||
| 2015-10-12 | Renamed Subindex to Index and added type information to Index and DoPrimOp | Jack | |
| 2015-10-12 | Added support for no width to mean unknown, and print nothing instead of <?> ↵ | Jack | |
| for unknown width. Also added test to check this | |||
| 2015-10-12 | Added FIRRTL comment removal to Translator | Jack | |
| 2015-10-07 | Added utility map functions Stmt -> Stmt, S; Exp -> Exp, S; Exp -> Exp, E | Jack | |
| 2015-10-07 | Added Printf and Stop to firrtl. #23 #24. | azidar | |
| 2015-10-06 | Added ability to test scala FIRRTL | Jack | |
| 2015-10-06 | Merge pull request #45 from ucb-bar/change-mem-type | Adam Izraelevitz | |
| Changed DefMemory to be a non-vector type with a size member | |||
| 2015-10-02 | Merged in Scala implementation of FIRRTL IR, parser, and serialization (ie. ↵ | Jack | |
| AST -> String). Uses ANTLRv4 to generate concrete syntax parser | |||
| 2015-10-01 | Merge pull request #43 from ucb-bar/new-semantics | Andrew Waterman | |
| Change of FIRRTL semantics! | |||
| 2015-10-01 | Changed DefMemory to be a non-vector type with a size member. Necessary for ↵ | azidar | |
| ASIC backend. | |||
| 2015-10-01 | Change of FIRRTL semantics! | azidar | |
| Assignments to a register are no longer affected by enclosing when statements: when p : reg r : UInt,clk,reset r := a will lower to: reg r : UInt,clk,reset r := a instead of: reg r : UInt,clk,reset when p : r := a | |||
| 2015-09-30 | Moved To-Real-Ir earlier, so CheckWidth could happen before PadWidth | azidar | |
| 2015-09-30 | Fixed naming bug where __1 was matching. Caused lots o issues. | azidar | |
| 2015-09-29 | Fixed final bug. All tests pass. Accessors are a go. | azidar | |
| 2015-09-29 | Added DecToIndexer/DecFromIndexer. Fixed most use cases of incorrect ↵ | azidar | |
| catching of initialization of accessors. Missing use case of accessing an accessor. Still need to update tests to pass | |||
| 2015-08-31 | Sped up low form check by not checking the type of every expression, as it ↵ | azidar | |
| is unneeded | |||
| 2015-08-28 | Moved check type and check kind after check gender | azidar | |
| 2015-08-26 | Fixed bug where subfields weren't entirely removed | azidar | |
| 2015-08-26 | Fixed bug where firrtl was incorrectly judging the width of a bigint. #36 #37. | azidar | |
| 2015-08-25 | Fix Verilog backend for mixed signed-unsigned ops | Andrew Waterman | |
| Code like add(UInt<1>(1), SInt<1>(1)) was resulting in Verilog like $signed(1'h1) + $signed(1'sh1) which is incorrect: it computes -2, not 0. The fix is to zero-extend the unsigned operand, e.g. $signed({1'b0,1'h1}) + $signed(1'sh1) | |||
| 2015-08-25 | Fixed bug in split expression that leaked connect statements out of a ↵ | azidar | |
| conditional assignment | |||
| 2015-08-25 | Removed IntWidth, now only use LongWidth. Now do width inference for ↵ | azidar | |
| Constants in parser, and correctly subtract 1 (except when 0) when calculating width from num-bits of BigInt | |||
| 2015-08-25 | Added width check pass with tests. #22. | azidar | |
| 2015-08-24 | Temporarily deprecated the flo backend until I fix it | azidar | |
| 2015-08-24 | Added BigInt error if passed a string without starting with a b or h | azidar | |
| 2015-08-20 | Added tests, cleaned up repo | azidar | |
| 2015-08-20 | Added Poison node. Includes tests. #26. | azidar | |
| 2015-08-20 | Added rsh to BigInt library. Const Prop now works on rsh's on constants. #19. | azidar | |
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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