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2020-01-07Switch compileFirrtlTest from Driver to FirrtlStageJack Koenig
2020-01-07Redirect testing shell commands to loggerJack Koenig
This includes the built-in functions in BackendCompilationUtilities which are a public API
2020-01-07Fix literals cast to Clocks in Print and StopJack Koenig
Many tools don't except 'always @(posedge 1'h0)' so we assign the literal to a wire and use that as the posedge target.
2020-01-07Remove unnecessary $signed casts for PrimOps in Verilog EmitterJack Koenig
[skip formal checks] Adds new InlineCastsTransform to the VerilogEmitter which removes Statements that do nothing but cast by inlining the cast Expression
2020-01-07Remove unnecessary casts in Constant PropagationJack Koenig
2020-01-06Verilog emitter transform InlineNots (#1270)John Ingalls
[skip formal checks] * ConstProp FoldEqual/FoldNotEqual propagate boolean (non-)equality with true/false * transform InlineNots * transform back-to-back Nots into straight rename * swap mux with inverted select Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
2019-12-30Respect last connect semantics in InferResetsJack Koenig
InferResets will now support last connect semantics (within the same scope) when determining the concrete reset type for components of type Reset. This only includes *unconditional* last connects; it remains illegal to drive a component of type Reset with different concrete types under differing when conditions. For example, the following is now legal: input a : UInt<1> input b : AsyncReset output z : Reset z <= a z <= b The second connect will when and z will be of type AsyncReset. The following remains illegal: input a : UInt<1> input b : AsyncReset input c : UInt<1> output z : Reset z <= a when c : z <= b This commit also ensures that components of type Reset with no drivers (or only invalidation) default to type UInt<1>. This fixes a bug where the transform would crash with such input.
2019-11-29Remove scala-logging fully in favor of our own loggerJack Koenig
There was some vestigial logging that conflicts with the homebrewed logger used by most of the codebase
2019-11-19Error when blackboxing memories with unsupported masking (#1238)Abraham Gonzalez
* Types containing bundles can't generally be converted to a single mask granularity * Update ReplSeqMemTests to check for illegal masks
2019-11-14Add test with Transform inside objectSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-11-07Add check for multiple sources for same wiring pin (#1191)Jack Koenig
2019-11-05Move CheckResets after CheckCombLoops (#1224)Jack Koenig
Recursive literal lookup needs to be guarded against combinational loops Added a test-case to illustrate the issue when CheckResets is run before CheckCombLoops
2019-11-04Merge branch 'master' into serialization-utilsJack Koenig
2019-11-04Ignore extmodule instances in Flatten (#1218)Albert Magyar
* Closes #1162 * Instances of extmodules remain in the final hierarchy * Extmodule definitions are not renamed or duplicated * The rest of the pass may proceed as normal
2019-11-04Add explicit EOF to top-level parser rule (#1217)Albert Magyar
* Fixes #1154 * Tests that #1154 example produces SyntaxErrorsException * Generally helps catch trailing syntax errors * Performance-neutral relative to previous grammar * Recommended by antlr4 devs, can help performance in some cases * See antlr/antlr4#1540
2019-10-31Guard initial blocks in emitted Verilog with `ifndef SYNTHESISJack Koenig
2019-10-30Add some simple tests to demonstrate how to provide type hintsDavid Biancolin
2019-10-29Change findInstancesInHierarchy to return implicit top instanceAlbert Magyar
* Change FIRRTL-internal API, affecting only one corner case * Make API more "DWIM" and consistent with other methods * Add test cases for findInstancesInHierarchy * Update Scaladoc
2019-10-22Add Register Updates/else-if Verilog Emitter testsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-10-21Add tests for memories with latency >1, toggling enablesAlbert Magyar
2019-10-21Add library for streamlined Verilog execution testsAlbert Magyar
2019-10-21Add test for #1179: comb-loops from VerilogMemDelaysAlbert Magyar
2019-10-18Upstream intervals (#870)Adam Izraelevitz
Major features: - Added Interval type, as well as PrimOps asInterval, clip, wrap, and sqz. - Changed PrimOp names: bpset -> setp, bpshl -> incp, bpshr -> decp - Refactored width/bound inferencer into a separate constraint solver - Added transforms to infer, trim, and remove interval bounds - Tests for said features Plan to be released with 1.3
2019-10-08Add test for TopWiringTransform idempotencySchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-09-30Implement read-first memories in VerilogMemDelaysAlbert Magyar
* Corrects behavior under write collisions * Avoids heavily refactoring pass
2019-09-30Improve read-under-write parameter supportAlbert Magyar
* Make the read-under-write (RUW) parameter typesafe * Add RUW support to the FIRRTL proto and CHIRRTL grammar
2019-09-19Faster inline renaming (#1184)Albert Chen
* dont chain inline and refix RenameMaps * cache already inlined modules * reduce number of chained RenameMaps * InlineInstances: cleanup and add comments
2019-09-16Rename gender to flowSchuyler Eldridge
The following names are changed: - gender -> flow - Gender -> Flow - MALE -> SourceFlow - FEMALE -> SinkFlow - BIGENDER -> DuplexFlow - UNKNOWNGENDER -> UnknownFlow Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-09-12update inline transform and testcasesAbert Chen
2019-09-05clean up spacing in inline testabejgonzalez
2019-08-19Refactor exceptions to remove stack trace from user errors (#1157)Jack Koenig
2019-08-13Infer reset (#1068)Jack Koenig
* Add abstract "Reset" which can be inferred to AsyncReset or UInt<1> * Enhance async reset initial value literal check to support aggregates
2019-08-07Add tests on RemoveReset of invalid initsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-07Check mems for legal latencies; ban zero write latency. (#1147)Albert Magyar
* Check mems for legal latencies; ban zero write latency. * Trigger
2019-08-07DRY check chirrtl (#1148)Albert Magyar
* Avoid redundancy between CheckChirrtl and CheckHighForm, add more checks * Add test case for illegal Chirrtl memory in HighForm
2019-08-05Add FileUtilsSpecSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-01Followup to PR #1142chick
- use scala.io.Source instead of io.Source - .toList cleaner way to force stream to be read. - clear old commented out code in ProtoBufSpec
2019-08-01Followup to PR #1142chick
Fixes a threading bug in where lazy reading of file caused a problem for multithreaded access to the that was read. Changes all uses of io.Source to use new API getText getLines getTextResource getLinesResouce Make style to only import FileUtils and not its methods So code is more explicit as e.g. FileUtils.getText()
2019-07-25Allow name of blackbox resource .f file to change from static value (#1129)Albert Magyar
* Allow name of blackbox resource .f file to change from static value * Restore fileListName as a deprecated def per Jack's feedback * Support both local and absolute paths for .f resource files
2019-07-24Add ExpandConnects to TopWiringTransform fixup (#1135)Schuyler Eldridge
This fixes a bug in the TopWiringTransform when wiring aggregates by adding ExpandConnects to its list of fixup passes. TopWiringTransform is MidForm => MidForm, but when wiring aggregates, it will output bulk connects. This violates the MidForm prerequisite that ExpandConnects has run. Symptomatically, this will manifest as match errors in LowerTypes if a user tries to use the TopWiringTransform on aggregates. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-07-21Fix RenameMap chaining (#1126)Albert Chen
* fix RenameMap chaining * fix order of chaining, add another test case
2019-07-19Add SimplifyMems transform to lower memories without splitting (#1111)Albert Magyar
* Add SimplifyMems transform to lower memories without splitting * Remove spurious anonymous function
2019-07-19Fix renaming of annotations with paths (#967)Albert Chen
* check isLocal before removing target tokens in RenameMap * add fix for Adam's test case, add more test cases * fix multiple renaming bug * call componentGet before checking underlying for ReferenceTargets in recursiveGet * add ModuleGet that implements new instance rename order * normalize target before renaming * fix forall/exists bug * add guards for isLocal cases * fix circuit renaming, fix traverseHierarchy, add debug prints * remove sensitivity stuff * add more tests * reapply parent path to renamed subpath, fix reference -> instance renames * remove debug prints * add instance as reference test case * fix Ref->IsMod, IsMod->Ref renamed, fix extra test cases * fix ofModule renaming for refs/instances * fix renaming of ofModules, change tests * fix more InstanceTarget rename bugs * remove bad ReferenceTarget test case * cleanup midRename of recursiveGet * fix comments * fix multiple ModuleTarget renames for InstanceTargets * dis-allow renaming of ModuleTargets to References * add back removed lines in RemoveCHIRRTL * fix indents * only add ofModule to refs if renaming an inst as a ref * change .moduleOpt.get to .module * disallow renaming ReferenceTarget->ModuleTarget * disallow ref->mod renames in tests, add inst as ref test cases * cache results of get functions * fix bot/mid/top renames, add andThen * fix andThen, add test case * add more test cases, fix ++ * fix comments, make things private * dont quit if earlier returns None, add dedup/inline rename tests * don't rename OfModules to instances paths * update dedup test * don't treat references as instances, don't reapply parents to absolute paths * fix more test cases * short-circuit OfModule renames if an absolute path is found * update andThen, remove orElse, deprecate ++ * removed commented code * update comments * respond to comments
2019-07-15Add type aliases for dependenciesSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-07-11Change Dependency API to Class[_ <: A]Schuyler Eldridge
This changes the Dependency API to specify dependencies in terms of classes subtyping the DependencyAPI trait. Previously, this was invariant which caused a bunch of ugly, unneeded .asInstanceOf jank. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-07-08Fix typo (#1114)Leway Colin
2019-07-03Add PhaseManager testsSchuyler Eldridge
Adds tests for the PhaseManager. This includes outputs in "test_run_dir" of Graphviz output. This will automatically generate a PNG if "dot" is on the path. Otherwise, it will just generate the Graphviz output. This includes tests that check for determinism.
2019-07-02Make sure directory exist before writing (#1110)Leway Colin
2019-06-28Remove deprecated ComponentName from CombinationalPath annotation (#1107)Albert Magyar
2019-06-28Add Test for AddDefaults phase (#1106)Leway Colin
* Add Test for AddDefaults phase * Refactor AddDefaultsSpec
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