sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Collapse)	Author
2019-05-04	Add register init to RemoveWires dependencies (#1078)	Schuyler Eldridge
	Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-02-14	Asynchronous Reset (#1011)	Jack Koenig
	Fixes #219 * Adds AsyncResetType (similar to ClockType) * Registers with reset signal of type AsyncResetType are async reset registers * Registers with async reset can only be reset to literal values * Add initialization logic for async reset registers
2018-08-07	Make RemoveWires properly include registers in dependency graph	Jack Koenig
	Fixes a bug where registers could be instantiated after nodes that referred to them Also add WRef.apply utility for nodes
2018-06-13	Resolve register clock dependencies in RemoveWires (#823)	Schuyler Eldridge
	Candidate fix for #749 This adds DefRegister netlist ordering to RemoveWires Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2017-12-12	Add RemoveWires transform	Jack Koenig
	This transform replaces all wires with nodes in a legal, flow-forward order