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Replace with more sensible comment to see LICENSE rather than including the
whole license in every file
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* Transform Ids now handled by Class[_ <: Transform] instead of magic numbers
* Transforms define inputForm and outputForm
* Custom transforms can be inserted at runtime into compiler or the Driver
* Current "built-in" custom transforms handled via above mechanism
* Verilog-specific passes moved to the Verilog emitter
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* Keep package name + directory structure consistent
This annoyed me so heres a PR
* fix InferReadWrite references
* delete .ConvertFixedToSInt.scala.swo
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turned on with '--inferRW <circuit name>'
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