| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2019-05-24 | Emit legal Verilog literals for ExtModule IntParams > 32-bit (#1087) | Jack Koenig | |
| Emit Verilog IntParams that fit in 32-bits as Integer literals | |||
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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