sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Collapse)	Author
2016-01-16	Fixed up minor errors after rebase onto master	azidar

2016-01-16	WIP Almost there, need to generate enable connections	azidar

2016-01-16	WIP, hit semantic bug in WSubAccess	azidar

2016-01-16	WIP. Compiles and there's some output	azidar

2016-01-16	WIP. Compiles, need to test	azidar

2016-01-16	WIP	azidar

2015-12-11	Added LoFirrtl compiler, can be called with -X lofirrtl	azidar

2015-11-02	Deleted extranous passes.stanza comments, updated standard passes. Added ↵	jackkoenig
	support for -b <backend> flag without any other specified passes in stanza, updated parser tests to work with stanza implementation.
2015-10-30	Added support for -b <backend> so that specific passes can be run then a ↵	jackkoenig
	backend can be applied. Added firrtl compiler for emitting firrtl
2015-08-24	Temporarily deprecated the flo backend until I fix it	azidar

2015-08-19	Switched to new bigint library	azidar

2015-08-03	Changed name mangling to use _ as a delin. Fixed bug in checking for	azidar
	invalid <> assignments.
2015-07-30	Added module name to error messages.	azidar

2015-07-30	Added primitive linking to firrtl-test-main	azidar

2015-07-30	Started adding linking support	azidar

2015-07-29	Add bigint support.	Adam Izraelevitz

2015-07-28	Integrated bigint. Mostly works, but getting "cast" error for make Test.	Adam Izraelevitz

2015-07-14	Updated flo backend	azidar

2015-07-14	Still partial commit, many tests pass. Many tests fail.	azidar

2015-07-02	Hopefully fixed stanza so it can correctly compile itself	azidar

2015-05-29	Fixed bugs in when-coverage pass. Works but has not been thoroughly tested	azidar

2015-05-29	Added custom pass. Does not correctly run, stanza just spins. Requires ↵	azidar
	debugging.
2015-05-18	First pass at a Verilog Backend. Not tested, but compiles and generates ↵	azidar
	reasonable verilog. Requires inlining, future versions will instantiate modules
2015-05-18	Big API Change. Pad is no longer supported. Widths of primops can be ↵	azidar
	flexible, and the output is usually the max of the inputs. Removed all u/s variants, which need to be dealt with in backends where it matters
2015-05-15	Updated firrtl for its passes to be a bit more modular, and to enable ↵	azidar
	plugging in other backends. Also updated a lot of tests, but not all of them because its annoying.
2015-05-13	Added source indicators from FIRRTL files. Pass in -p i to get them printed. ↵	azidar
	Should show up with check passes
2015-05-02	Added a infrastructure for check passes, and wrote a few	azidar

2015-04-22	Switched to stricter primop width constraints. Implemented Pad. Added some ↵	azidar
	missing primops
2015-04-20	Fixed tests to use new execution arguments. Added and fixed chisel3 bugs	azidar

2015-04-17	Removed excessive debug print statements, added default call to firrtl to ↵	azidar
	generate flo
2015-04-17	Fixed bug in primop lowering during type inference. Added reduce ↵	azidar
	instructions and renamed concat -> cat, equal -> eq, and added neq and neg
2015-04-10	Updated Stanza	Patrick Li

2015-04-08	Finished expand whens. started infer widths. added pdf for people to view	azidar

2015-03-24	With new stanza	azidar

2015-03-04	Changed lots of directions to genders. Started writing infer-gender pass. ↵	azidar
	Does not compile
2015-02-25	Added debug print statements to dump fields from nodes, and updated tests to ↵	azidar
	call firrtl correctly to enable/disable them
2015-02-24	Rewrote README to include installation instructions and stanza ↵	azidar
	justification. Added response to feedback, locatd in notes/feedbackQA*. Use two different mains, one for testing and one for deployment (make build vs make build-deploy).