sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Collapse)	Author
2016-01-16	WIP	azidar

2015-08-25	Removed IntWidth, now only use LongWidth. Now do width inference for ↵	azidar
	Constants in parser, and correctly subtract 1 (except when 0) when calculating width from num-bits of BigInt
2015-08-24	Added BigInt error if passed a string without starting with a b or h	azidar

2015-08-19	Check Neg UInt in the parser	azidar

2015-07-28	Integrated bigint. Mostly works, but getting "cast" error for make Test.	Adam Izraelevitz

2015-07-14	Added clock support	azidar

2015-06-03	Fixed verilog backend bugs. Passes ALU. Fails Datapath	azidar

2015-06-02	Added sequential/combinational memories. Started debugging verilog backend. ↵	azidar
	Added Long support so UInt(LARGENUMBER) works
2015-05-29	Fixed bugs in when-coverage pass. Works but has not been thoroughly tested	azidar

2015-05-29	Added custom pass. Does not correctly run, stanza just spins. Requires ↵	azidar
	debugging.