| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-07-14 | Added tests for clocks. Added remove scope and special chars passes. Added te... | azidar |
| 2015-07-14 | Added clock support | azidar |
| 2015-06-04 | Fixed fir files so they correctly compile to verilog! Front-end needs to gene... | azidar |
| 2015-06-02 | Added low firrtl check. Corrected bug in prefix matching in high firrtl check | azidar |
| 2015-05-29 | Added custom pass. Does not correctly run, stanza just spins. Requires debugg... | azidar |
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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