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path: root/src/main/scala/firrtl/transforms
AgeCommit message (Expand)Author
2018-07-20Constant prop add (#849)albertchen-sifive
2018-07-10Combinational Dependency Annotation (#809)Adam Izraelevitz
2018-06-28Make CheckCombLoops find combinational nodes with self-edges (#837)Albert Magyar
2018-06-13Resolve register clock dependencies in RemoveWires (#823)Schuyler Eldridge
2018-06-11Use attach to connect analogs when grouping (#805)Colin Schmidt
2018-06-06ConstProp attached wires if there is also a port (#818)Jack Koenig
2018-05-29Fix pad (#817)Jack Koenig
2018-05-15Replace truncating add and sub with addw/subw (#800)Jack Koenig
2018-05-11TopWiring Transform (#798)alonamid
2018-05-09Bugfix: ports of a temporary name would break const-prop (#806)Adam Izraelevitz
2018-05-02Deprecate old WiringUtils methods/classes (#801)Schuyler Eldridge
2018-04-16Cleaning up BlackBoxSourceHelper - use absolute file paths. (#789)Jim Lawson
2018-04-11Cleaning up BlackBoxSourceHelper (#786)Henry Cook
2018-04-10Fix bug in Constant Propagation for registers propped to zero (#787)Jack Koenig
2018-04-03Make Dedup properly dedup ExtModules (#781)Jack Koenig
2018-04-02CyclicException identifies a problem node. (#778)Chick Markley
2018-03-28Replace unconnected registers with 0 in Constant Propagation (#776)Jack Koenig
2018-03-27Change throwInternalError to use a String instead of Option[String] (#777)Jack Koenig
2018-03-27Const prop improvement (#772)Jack Koenig
2018-03-23Make Register Update Flattening a Transform and Delete Dangling Nodes (#692)Jack Koenig
2018-03-21GroupModule Transform (#766)Adam Izraelevitz
2018-02-27Refactor Annotations (#721)Jack Koenig
2018-02-27Add log-level debug message for modules that get deduped (#748)Jack Koenig
2018-02-22Add tests for #702. Adds Utility functions. Allows clock muxing in FIRRTL, bu...Adam Izraelevitz
2018-02-16Replacematcherror - catch exceptions and convert to internal error. (#424)Jim Lawson
2018-01-30Make Constant Propagation respect dontTouch on registersJack Koenig
2018-01-30Fix bug incorrectly propagating constants on submodule inputsJack Koenig
2017-12-29Add logger printing for declarations removed by DCEJack Koenig
2017-12-12Add RemoveWires transformJack Koenig
2017-12-12Make object ConstantPropagation utilsJack Koenig
2017-11-28Have DedupModules report renamingJack
2017-11-10Make digraph methods deterministic (#653)Albert Magyar
2017-09-21Some ScalaDoc warning fixesEdward Wang
2017-08-14Constant propagation across module boundaries (#633)Jack Koenig
2017-08-04bug fix for cases when we want to flatten a module in which a module is insta...Andrey Ayupov
2017-08-01DCE for IsInvalid (#629)Donggyu
2017-07-26Flatten transformation (#631)Andrey Ayupov
2017-07-17do not swap wire names with node namesDonggyu Kim
2017-07-17Fix ConstProp bug where multiple names would swap with oneJack Koenig
2017-06-29ConstProp registers that are only connected to or reset to a consantJack Koenig
2017-06-29Preserve "better" names in Constant PropagationJack Koenig
2017-06-28Make Constant Propagation respect dontTouchJack Koenig
2017-06-28Promote ConstProp to a transformJack Koenig
2017-06-27Add RemoveReset transform to replace register reset with a MuxJack Koenig
2017-06-21Add --no-dce command-line option to skip DCEJack Koenig
2017-06-12Add option to disable combinational loop detectionJack Koenig
2017-06-12Move CheckCombLoops from passes/ to transforms/Jack Koenig
2017-05-25Fix performance bug in DCE (#596)Jack Koenig
2017-05-19Delete black_box_verilog_files.f if we aren't going to create it - fixes #504...Jim Lawson
2017-05-17Make sure not to DCE input-only extmodules unless specified (#590)Jack Koenig
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