sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Collapse)	Author
2020-03-04	Revert "Verilog emitter transform InlineNots (#1270)"	Albert Magyar
	This reverts commit f77487d37bd7c61be231a8000a3197d37cf55499.
2020-01-15	Verilog emitter transform InlineBitExtractions (#1296)	John Ingalls
	* transform InlineBitExtractions * InlineNotsTransform, InlineBitExtractionsTransform: inputForm/outputForm = UnknownForm * clean up some minor redundancies from Adam review * clarifications from Seldrige review
2020-01-06	Verilog emitter transform InlineNots (#1270)	John Ingalls
	[skip formal checks] * ConstProp FoldEqual/FoldNotEqual propagate boolean (non-)equality with true/false * transform InlineNots * transform back-to-back Nots into straight rename * swap mux with inverted select Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>