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path: root/src/main/scala/firrtl/passes
AgeCommit message (Expand)Author
2019-09-12update inline transform and testcasesAbert Chen
2019-08-19Refactor exceptions to remove stack trace from user errors (#1157)Jack Koenig
2019-08-13Infer reset (#1068)Jack Koenig
2019-08-09Remove unused CheckHighFormLike.IllegalChirrtlMemException (#1151)Albert Magyar
2019-08-07Check mems for legal latencies; ban zero write latency. (#1147)Albert Magyar
2019-08-07DRY check chirrtl (#1148)Albert Magyar
2019-08-01Followup to PR #1142chick
2019-07-08Remove some warnings (#1118)Leway Colin
2019-06-18Use scalafix to remove unused import and deprecated procedure syntax (#1074)Leway Colin
2019-05-29make analog attachment order fixed with linked hash map (#1089)harrisonliew
2019-05-04Use UnknownKind instead misrepresented NodeKind (#1076)Leway Colin
2019-04-25Add ShellOption, DeletedWrapperSchuyler Eldridge
2019-04-25Add FirrtlStage, make Driver compatibility layerSchuyler Eldridge
2019-04-22Change Memory Depth to a BigInt (#1075)Jack Koenig
2019-03-26Convert the RemoveAccesses object into a class. (#1058)Jim Lawson
2019-03-19Designs with no SeqMems should produce empty MemConf strings, and this should...John Wright
2019-03-07Add a data structure for memory conf reading and writing (#1041)John Wright
2019-02-28[ExpandWhens] Don't create nodes to hold Muxes with >0 void cases (#1039)Albert Magyar
2019-02-25Run CheckHighForm after all non-emitter transforms in firrtl tests (#548)Jack Koenig
2019-02-25Detect and error on registers with flip in type (#1031)Albert Magyar
2019-02-25Fix almost all Scaladoc warningsSchuyler Eldridge
2019-02-22Add Width Constraints with Annotations (#956)Albert Chen
2019-02-14Asynchronous Reset (#1011)Jack Koenig
2019-02-11Fix typo for -c: compiler -> circuit (#1014)John Wright
2019-02-05Do Shr constant propagation in LegalizeSchuyler Eldridge
2019-02-01Mem helpers (#1010)Albert Magyar
2019-01-23Improve Shl codegen; eliminate Shlw WIR node (#994)Andrew Waterman
2018-12-25Performance fix of Uniquify for deep bundles (#980)Adam Izraelevitz
2018-12-18Give better error when mport references non-existant memory. (#975)Paul Rigge
2018-11-29Replace Mappers with Foreachers in several passes (#954)Albert Magyar
2018-11-27Add foreach as alternative to map (#952)Adam Izraelevitz
2018-11-26Make return types of util functions more specific (#949)Albert Magyar
2018-11-07Make ClockListAnnotation a RegisteredTransformSchuyler Eldridge
2018-11-07Make InlineInstances a RegisteredTransformSchuyler Eldridge
2018-11-07Add MemLibOptions RegisteredLibrarySchuyler Eldridge
2018-11-07Make ReplSeqMem mixin HasScoptOptionsSchuyler Eldridge
2018-11-07Make InferReadWrite mixin HasScoptOptionsSchuyler Eldridge
2018-11-07Add FirrtlOptionsSchuyler Eldridge
2018-11-05Better error message for UninferredWidth exceptionSchuyler Eldridge
2018-11-02Fix renaming in UniquifyPorts (#930)Albert Chen
2018-10-31Remove all uses of get_flip and deprecateJack Koenig
2018-10-31Use Vector instead of List for bulk renaming in RenameMapJack Koenig
2018-10-31Speed up LowerTypes by replacing foldLeft + List appends with flatMapJack Koenig
2018-10-31Speed up ExpandWhens by replacing foldLeft + List appends with flatMapJack Koenig
2018-10-31Speed up ExpandConnects by replacing foldLeft + List appends with flatMapJack Koenig
2018-10-30Instance Annotations (#926)Adam Izraelevitz
2018-10-27Revert "Instance Annotations (#865)" (#925)Adam Izraelevitz
2018-10-24Instance Annotations (#865)Adam Izraelevitz
2018-10-12Refactor VerilogRename -> RemoveKeywordCollisionsSchuyler Eldridge
2018-10-12Verilog renaming uses "_", works on whole ASTSchuyler Eldridge
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