| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-05-03 | Add checks on register clock and reset types (#33) (#553) | Albert Magyar |
| 2017-03-23 | Pass now subclasses Transform (#477) | Adam Izraelevitz |
| 2017-03-09 | Sint tests and change in serialization (#456) | Adam Izraelevitz |
| 2017-02-07 | Rework Attach to work on arbitrary Analog hierarchies (#415) | Jack Koenig |
| 2016-12-13 | Add MaxWidth of 1,000,000 bits | jackkoenig |
| 2016-12-13 | Move CheckWidths to its own file | jackkoenig |
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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