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Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
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Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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* Add Scaladoc for EdgeData API
* Include stringified vertices in EdgeNotFoundException
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This adds a method to DiGraph called "seededLinearize". This
generalizes the original topological sort ("linearize") to be
parametric in an initial set of vertices. This enables the user to
massage the DFS to produce a better topological sort if they have
information about how the DFS should proceed.
The initial set of vertices is expected to be made ordered via a
LinkedHashSet.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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* Create a simple generic graphviz renderer for DiGraph
There are three basic kinds
- A simple default renderer
- A ranked renderer that places nodes in columns based on depth from sources
- A sub-graph render for graphs that contain a loop
- Renders just nodes that are part of first loop found
- Plus the neighbors of the loop
- Loop edges are shown in red.
* Create a simple generic graphviz renderer for DiGraph
- Moved the graph loop finder into DiGraph
- Fixed scala doc per Edward's comments
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This fixes a bug where DiGraph summation (using the `+` operator) would
mutate the DiGraph. This occurred because the underlying edges set was not
being cloned. This is fixed to explicitly clone the underlying edges set.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Useful if you want to find out how a node was reachable and you used a blacklist during the reachability analysis
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Also make DiGraphTests more ScalaTest-y
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Needed for special handling in Treadle.
Small refactor that allows users of DiGraph#linearize
to return the first node found in a cycle.
Fixed RemoveWiresTransfrom to handle this.
Added test to show usage of this feature.
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* Added grouping pass
* Added InfoMagnet and infomappers
* Changed return type of execute to allow final CircuitState inspection
* Updated dedup. Now is name-agnostic
* Added GroupAndDedup transform
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* Add DiGraph sum and DiGraph sum test
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Make DiGraph sum deterministic
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Remove ordered hashes/sets from DiGraphTests
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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A circuit with a single module would fail to properly compute BV RMQs due
to a divide by zero bug.
This changes the computation of the number of blocks an Euler Tour is
broken up into to be, at minimum, one.
This also changes one of the test cases ("wire with source and sink in the
same module") to exercise this.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Massive refactoring to WiringTransform with the use of a new EulerTour
class to speed things up via fast least common ancestor (LCA) queries.
Changes include (but are not limited to):
* Use lowest common ancestor when wiring
* Add EulerTour class with naive and Berkman-Vishkin RMQ
* Adds LCA method for Instance Graph
* Enables "Two Sources" using "Top" wiring test as this is now valid
* Remove TopAnnotation from WiringTransform
* Represent WiringTransform sink as `Seq[Named]`
* Remove WiringUtils.countInstances, fix imports
* Support sources under sinks in WiringTransform
* Enable internal module wiring
* Support Wiring of Aggregates
h/t @edcote
fixes #728
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Reviewed-by: Jack Koenig<jack.koenig3@gmail.com>
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This resulted in parent modules sometimes being constant proppagated
before a child module. If the child module has a constant driving one of
its outputs, the parent module would thus not see the constant. This
resulted in strange unstable constant propagation behavior where
sometimes constant outputs would not propagate.
Also add test illustrating why this occurs with uses of InstanceGraph
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* Make pathsInDAG walk all possible paths
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Use linearization order when finding all paths in DAG
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