| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-09-12 | Legalize bit select. Run Legalize after PadWidths. | Jack | |
| Bit selecting a literal resulted in invalid Verilog. Legalize now deals with this by replacing any bits select of UInt or SInt literals with a new literal composed of the selected bits. Legalize also is now run after PadWidths because that pass introduces this issue. Fixes #170 | |||
| 2016-09-07 | Added ReplaceSubAccesses before RemoveSubAccesses | azidar | |
| 2016-09-06 | Added starter code for SMem replacement | Angie | |
| 2016-08-02 | Merge pull request #203 from ucb-bar/fix_mem_infer | Adam Izraelevitz | |
| Fix mem infer | |||
| 2016-08-02 | make infer readwrite ports optional | Donggyu Kim | |
| turned on with '--inferRW <circuit name>' | |||
| 2016-07-29 | remove ConstProp in HighFirrtlToMiddleFirrtl | Donggyu Kim | |
| ConstProp before width padding causes errors for SIntLiteral | |||
| 2016-07-28 | InferWidths now only fixes declaration widths | azidar | |
| Then calls InferTypes to propagate inferred widths to expressions. Required upgrading InferTypes to do simple width propagation. Fixes #206 and #200. | |||
| 2016-07-27 | infer readwrite ports for backward compatibility | Donggyu Kim | |
| 2016-07-27 | Reworked annotation system. Added tenacity and permissibility | Adam Izraelevitz | |
| Conflicts: src/main/scala/firrtl/Compiler.scala src/main/scala/firrtl/LoweringCompilers.scala src/main/scala/firrtl/passes/Inline.scala src/test/scala/firrtlTests/AnnotationTests.scala src/test/scala/firrtlTests/InlineInstancesTests.scala | |||
| 2016-07-25 | Changed InferTypes to update types if UnknownType or has an UnknownWidth | azidar | |
| Removed InferWidths after ExpandWhens | |||
| 2016-07-21 | Added a Chirrtl check for undeclared wires, etc. | azidar | |
| 2016-07-07 | Re-run constant propagation after pad widths | Andrew Waterman | |
| 2016-06-10 | API Cleanup - AST | Jack | |
| trait AST -> abstract class FirrtlNode Move all IR to new package ir Add import of firrtl.ir._ | |||
| 2016-05-12 | Restructured Compiler to use Transforms. Added an InlineInstance pass. | Adam Izraelevitz | |
| Transforms are new unit of modularity within the compiler. | |||
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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