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path: root/src/main/scala/firrtl/Compiler.scala
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2017-03-06Added more stylized debugging styleAdam Izraelevitz
2017-03-06Addresses #459. Rewords transform annotations API.Adam Izraelevitz
Now, any annotation not propagated by a transform is considered deleted. A new DeletedAnnotation is added in place of it.
2017-03-06Added pass name to debug loggerAdam Izraelevitz
2017-03-06Add ability to emit 1 file per module (#443)Jack Koenig
Changes Emitters to also be Transforms and use Annotations for both telling an emitter to do emission as well as getting the emitted result. Helper functions ease the use of the new interface. Also adds a FirrtlExecutionOptions field as well as a command-line option. Use of Writers in Compilers and Emitters is now deprecated.
2017-01-05Fix ScalaDoc complaints; add sbt-site, sbt-ghpages boilerplate.Jim Lawson
2016-12-06Fixes for Annotation serialized/deserialize (#390)Chick Markley
* Fixes for Annotation serialized/deserialize Made serializer agree with deserializer on text representation Re-ordered serializations of Named subclasses to be C or C.m or C.m.c where C=circuit, m=module, c=component Note: component may contain dots Added serialize deserialize tests to AnnotationSpec Did some style cleanup on AnnotationSpec Added explicit return tupe on SimpleTransformSpec#execute * Make explicit Util.error remove commented code * Make Annotation#serialize a nicer format fix import there and remove new on case class * In firrtl Driver.execute use annotations passed in through optionsManager#firrtlOptions if nonEmpty otherwise read the annotations in from an annotations file Add new option to override this behavior, --force-append-anno-file will append annotations in file to any that are passed in A few other style fixes to Driver: remove new with case classes. don't use match when if(boolean) will do * Added tests of malformed component and circuit names
2016-11-23Stringified annotations (#367)Adam Izraelevitz
Restricts annotations to be string-based (and thus less typesafe) Makes annotations more easily serializable and interact with Chisel
2016-11-07Fix annotations (#366)Adam Izraelevitz
getMyAnnotations now returns Seq[Annotation] Changed test to check number of annotations is the same
2016-11-04Cleanup license at top of every file (#364)Jack Koenig
Replace with more sensible comment to see LICENSE rather than including the whole license in every file
2016-11-04Add a pass to deduplicate modulesazidar
2016-11-04Refactor Compilers and Transformsjackkoenig
* Transform Ids now handled by Class[_ <: Transform] instead of magic numbers * Transforms define inputForm and outputForm * Custom transforms can be inserted at runtime into compiler or the Driver * Current "built-in" custom transforms handled via above mechanism * Verilog-specific passes moved to the Verilog emitter
2016-09-14style fixes for Compiler.scala, LoweringCompiler.scalaDonggyu Kim
2016-07-27Reworked annotation system. Added tenacity and permissibilityAdam Izraelevitz
Conflicts: src/main/scala/firrtl/Compiler.scala src/main/scala/firrtl/LoweringCompilers.scala src/main/scala/firrtl/passes/Inline.scala src/test/scala/firrtlTests/AnnotationTests.scala src/test/scala/firrtlTests/InlineInstancesTests.scala
2016-06-10API Cleanup - ASTJack
trait AST -> abstract class FirrtlNode Move all IR to new package ir Add import of firrtl.ir._
2016-05-12Restructured Compiler to use Transforms. Added an InlineInstance pass.Adam Izraelevitz
Transforms are new unit of modularity within the compiler.
2016-05-10Modified Verilog compiler to use new passesAdam Izraelevitz
RemoveValidIf, SplitExpressions, and PadWidths
2016-04-22Add Uniquify Passjackkoenig
Also add pass to Verilog Compiler list of passes This pass appends '_' to the names of aggregate types that would cause a name collision during LowerTypes.
2016-04-21Avoid Lint errors connecting wide signals to narrow onesAndrew Waterman
2016-04-21Run Split Expressions before ConstProp, CSE, and DCEjackkoenig
This gives more expressions to eliminate
2016-04-14Add CSE passAndrew Waterman
2016-04-07Add primitive dead code elimination passAndrew Waterman
2016-03-15Change non-reentrant VerilogEmitter from object to classJack
2016-03-10Add support for right shift by amount larger than argument widthjackkoenig
2016-02-23Change FIRRTL Compiler to remove CHIRRTL and Check High FIRRTL FormJack
2016-02-23Stop closing writers in compiler, close in Driver instead (allows others to ↵Jack
use StringWriters without the Compiler closing it)
2016-02-09Added license to FIRRTL filesazidar
2016-02-09Added remaining check passes. Ready for open sourcingazidar
2016-02-09Added chirrtl passes, need to update parserazidar
2016-02-09More bug fixesazidar
2016-02-09Added constprop,v-wrap,v-rename. All set to attempt like->like comparison of ↵azidar
rocketchip
2016-02-09Added Lower Types.azidar
2016-02-09Moved passes to new packageazidar
2016-02-09Restructure passes to be new subpackage with more modular design, add new ↵Jack
structures Compiler and Emitter, deprecate old Passes object, update Driver to use new constructs