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path: root/src/main/scala/firrtl/Compiler.scala
AgeCommit message (Expand)Author
2019-02-22Stop reporting exceptions in custom transformations as internal errors (#867)Jack Koenig
2018-12-20Require transforms.size >= 1 for CompilersSchuyler Eldridge
2018-10-30Instance Annotations (#926)Adam Izraelevitz
2018-10-27Revert "Instance Annotations (#865)" (#925)Adam Izraelevitz
2018-10-24Instance Annotations (#865)Adam Izraelevitz
2018-08-30Emit Verilog Comments (#874)albertchen-sifive
2018-08-08Use LinkedHashSet in propagateAnnotations (#855)albertchen-sifive
2018-03-28Enhance RenameMap to support circuit renaming (#775)Jack Koenig
2018-03-27Change throwInternalError to use a String instead of Option[String] (#777)Jack Koenig
2018-02-27Refactor Annotations (#721)Jack Koenig
2018-02-16Replacematcherror - catch exceptions and convert to internal error. (#424)Jim Lawson
2017-11-28Refactor RenameMap to rename Components if their Module is renamedJack
2017-09-21Some ScalaDoc warning fixesEdward Wang
2017-06-06Display the total time firrtl took to compile (#599)Colin Schmidt
2017-05-27Prep for Scala 2.12 (#557)Jim Lawson
2017-05-10Update rename2 (#478)Adam Izraelevitz
2017-04-20move circuit dumping to trace so debug gives annos only (#524)Colin Schmidt
2017-03-23Pass now subclasses Transform (#477)Adam Izraelevitz
2017-03-22Throw different error message for missing emitannoAdam Izraelevitz
2017-03-17Give better error message if missing emitedcircuitAdam Izraelevitz
2017-03-06Added more stylized debugging styleAdam Izraelevitz
2017-03-06Addresses #459. Rewords transform annotations API.Adam Izraelevitz
2017-03-06Added pass name to debug loggerAdam Izraelevitz
2017-03-06Add ability to emit 1 file per module (#443)Jack Koenig
2017-01-05Fix ScalaDoc complaints; add sbt-site, sbt-ghpages boilerplate.Jim Lawson
2016-12-06Fixes for Annotation serialized/deserialize (#390)Chick Markley
2016-11-23Stringified annotations (#367)Adam Izraelevitz
2016-11-07Fix annotations (#366)Adam Izraelevitz
2016-11-04Cleanup license at top of every file (#364)Jack Koenig
2016-11-04Add a pass to deduplicate modulesazidar
2016-11-04Refactor Compilers and Transformsjackkoenig
2016-09-14style fixes for Compiler.scala, LoweringCompiler.scalaDonggyu Kim
2016-07-27Reworked annotation system. Added tenacity and permissibilityAdam Izraelevitz
2016-06-10API Cleanup - ASTJack
2016-05-12Restructured Compiler to use Transforms. Added an InlineInstance pass.Adam Izraelevitz
2016-05-10Modified Verilog compiler to use new passesAdam Izraelevitz
2016-04-22Add Uniquify Passjackkoenig
2016-04-21Avoid Lint errors connecting wide signals to narrow onesAndrew Waterman
2016-04-21Run Split Expressions before ConstProp, CSE, and DCEjackkoenig
2016-04-14Add CSE passAndrew Waterman
2016-04-07Add primitive dead code elimination passAndrew Waterman
2016-03-15Change non-reentrant VerilogEmitter from object to classJack
2016-03-10Add support for right shift by amount larger than argument widthjackkoenig
2016-02-23Change FIRRTL Compiler to remove CHIRRTL and Check High FIRRTL FormJack
2016-02-23Stop closing writers in compiler, close in Driver instead (allows others to u...Jack
2016-02-09Added license to FIRRTL filesazidar
2016-02-09Added remaining check passes. Ready for open sourcingazidar
2016-02-09Added chirrtl passes, need to update parserazidar
2016-02-09More bug fixesazidar
2016-02-09Added constprop,v-wrap,v-rename. All set to attempt like->like comparison of ...azidar
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