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path: root/src/main/scala/firrtl/AddDescriptionNodes.scala
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2020-03-12Add Support for FPGA Bitstream Preset-registers (#1050)John's Brew
Introduce Preset Register Specialized Emission - Introduce EmissionOption trait - Introduce PresetAnnotation & PresetRegAnnotation - Enable the collection of Annotations in the Emitter - Introduce collection mechanism for EmissionOptions in the Emitter - Add PropagatePresetAnnotation transform to annotate register for emission and clean-up the useless reset tree (no DCE involved) - Add corresponding tests spec and tester Co-authored-by: Jack Koenig <koenig@sifive.com>
2020-03-11Migrate to DependencyAPISchuyler Eldridge
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Co-authored-by: Albert Magyar <albert.magyar@gmail.com> Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-02-25Fix almost all Scaladoc warningsSchuyler Eldridge
This fixes all Scaladoc warnings except for those trying to link to Java. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2018-11-27Add foreach as alternative to map (#952)Adam Izraelevitz
* Added Foreachers * Changed CheckTypes to use foreach * Check widths now uses foreach * Finished merge, added foreachers to added stmts * Address reviewer feedback
2018-08-30Emit Verilog Comments (#874)albertchen-sifive
add description nodes, transform; modify VerilogEmitter to emit comments
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