| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2019-02-22 | Bump yosys to 0.8 (#1029) | Adam Izraelevitz | |
| 2017-12-18 | Bump sbt (#703) | Jack Koenig | |
| Bump SBT to 1.0.4 and update plugins Update Scala versions and sbt commands in .travis.yml Replace run-main with runMain | |||
| 2017-12-12 | Refactor formal equivalence CI test | Jack Koenig | |
| Make the check script allow different designs Add FPU, ICache, and RocketCore to regress and use instead of Rob for CI equivalence check | |||
| 2017-11-16 | Make Yosys equivalence check more robust (#686) | Jack Koenig | |
| Also let Travis know that equivalence checks can take a while | |||
| 2017-10-01 | Add script for formally comparing emitted Verilog | Jack Koenig | |
| Also add Travis test for running this script on PRs | |||
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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