aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2017-05-25Fix performance bug in DCE (#596)Jack Koenig
2017-05-25Fix performance bug in ZeroWidth (#594)Jack Koenig
2017-05-19Delete black_box_verilog_files.f if we aren't going to create it - fixes #504...Jim Lawson
2017-05-18Bump scopt for prettier option parsing (#546)Schuyler Eldridge
2017-05-18Upgrade Logging facility (#488)Chick Markley
2017-05-17Make sure not to DCE input-only extmodules unless specified (#590)Jack Koenig
2017-05-12Bugfix: renaming instance ports was broken. (#588)Adam Izraelevitz
2017-05-12Fix pad, second try (#465)Adam Izraelevitz
2017-05-11Improved Global Dead Code Elimination (#549)Jack Koenig
2017-05-11Refactor WIR WSub{Field,Index,Access} - rename exp -> expr #521 (#586)Jim Lawson
2017-05-10Fix typo in ExecutionOptionsManager comment (#520)Colin Schmidt
2017-05-10Update rename2 (#478)Adam Izraelevitz
2017-05-03Add checks on register clock and reset types (#33) (#553)Albert Magyar
2017-05-03Add test for source locators on multi-line reset registers (#554)Jack Koenig
2017-04-28Add info on reset block lines to ANTLR grammar (#468)Albert Magyar
2017-04-20move circuit dumping to trace so debug gives annos only (#524)Colin Schmidt
2017-04-18"Scope" test resource (top.cpp). (#398)Jim Lawson
2017-04-13Speed up CSE by doing CSE on node expression before recording the node (#543)Jack Koenig
2017-04-04DecorateMems should not delete annoations (#523)Colin Schmidt
2017-04-03Change implicit value classes to prefix with _ (#522)Adam Izraelevitz
2017-04-03Find a single cycle from potentially many in a combinational SCCAlbert Magyar
2017-03-30Make force-append-anno-file work. Fixes #515 (#516)Jack Koenig
2017-03-30Change findSCCs to iterative implementation (#513)Albert Magyar
2017-03-29Fix bug where zero width expressions in nodes wouldn't get zeroed (#514)Jack Koenig
2017-03-23Add pass to detect combinational loopsAlbert Magyar
2017-03-23Pass now subclasses Transform (#477)Adam Izraelevitz
2017-03-23Add TargetDirAnnotation to give transforms access (#503)Jack Koenig
2017-03-22Throw different error message for missing emitannoAdam Izraelevitz
2017-03-22Fixed zero width perf bug #502Adam Izraelevitz
2017-03-22Fix unapply of pinAdam Izraelevitz
2017-03-22Fixing whitespace broke test....azidar
2017-03-22Bugfix: apply/unapply of PinAnnotation brokenazidar
2017-03-17Add utilites for digraphs and netlist analysesAlbert Magyar
2017-03-17Give better error message if missing emitedcircuitAdam Izraelevitz
2017-03-15Merge pull request #495 from albert-magyar/fix-rocket-regressAlbert Magyar
2017-03-15Use newer rocket regression spec without comb loopAlbert Magyar
2017-03-15Update readme with links to wiki (#493)Adam Izraelevitz
2017-03-14Small fixAdam Izraelevitz
2017-03-14Fixed shadowing of expression lesson2Adam Izraelevitz
2017-03-14Style fixesAdam Izraelevitz
2017-03-14Fixed README tutorial linkAdam Izraelevitz
2017-03-14Added lesson2Adam Izraelevitz
2017-03-10Tweak git clone commandEdward Wang
2017-03-10Set theme jekyll-theme-minimalAdam Izraelevitz
2017-03-10Changed custom transform option and help textAdam Izraelevitz
2017-03-10Added comments and section in READMEAdam Izraelevitz
2017-03-10Added tutorial passAdam Izraelevitz
2017-03-10Added custom transform commandline optionAdam Izraelevitz
2017-03-10Added Circuit mappersAdam Izraelevitz
2017-03-09make sure infer-rw works for exclusive when statements (#481)Donggyu
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-31 20:27:53 +0000