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-rw-r--r--test/passes/infer-types/bundle.fir13
-rw-r--r--test/passes/infer-types/gcd.fir20
-rw-r--r--test/passes/infer-types/primops.fir222
-rw-r--r--test/passes/initialize-register/when.fir2
-rw-r--r--test/passes/resolve-kinds/gcd.fir6
5 files changed, 144 insertions, 119 deletions
diff --git a/test/passes/infer-types/bundle.fir b/test/passes/infer-types/bundle.fir
new file mode 100644
index 00000000..10a839a1
--- /dev/null
+++ b/test/passes/infer-types/bundle.fir
@@ -0,0 +1,13 @@
+; RUN: firrtl %s abcde ct | tee %s.out | FileCheck %s
+
+;CHECK: Infer Types
+circuit top :
+ module subtracter :
+ wire z : {input x : UInt, output y: SInt}
+ node x = z.x ;CHECK: node x = z@<t:{input x : UInt@<t:UInt>, output y : SInt@<t:SInt>}>.x@<t:UInt>
+ node y = z.y ;CHECK: node y = z@<t:{input x : UInt@<t:UInt>, output y : SInt@<t:SInt>}>.y@<t:SInt>
+
+ wire a : UInt(3)[10] ;CHECK: wire a : UInt(3)[10]@<t:UInt>@<t:UInt(3)[10]@<t:UInt>>
+ node b = a.2 ;CHECK: node b = a@<t:UInt(3)[10]@<t:UInt>>.2@<t:UInt>
+ accessor c = a[UInt(3)] ;CHECK: unknown accessor c = a@<t:UInt(3)[10]@<t:UInt>>[UInt(3)]
+; CHECK: Finished Infer Types
diff --git a/test/passes/infer-types/gcd.fir b/test/passes/infer-types/gcd.fir
index 4fdc9ab1..b60c4f38 100644
--- a/test/passes/infer-types/gcd.fir
+++ b/test/passes/infer-types/gcd.fir
@@ -6,8 +6,8 @@ circuit top :
input x : UInt
input y : UInt
output z : UInt
- z := sub-mod(x, y)
- ;CHECK: z@<t:UInt> := sub-mod(x@<t:UInt>, y@<t:UInt>)@<t:UInt>
+ z := sub-wrap(x, y)
+ ;CHECK: z@<t:UInt> := sub-wrap(x@<t:UInt>, y@<t:UInt>)@<t:UInt>
module gcd :
input a : UInt(16)
input b : UInt(16)
@@ -19,17 +19,17 @@ circuit top :
; CHECK: reg x : UInt
x.init := UInt(0)
y.init := UInt(42)
- when greater(x, y) :
- ;CHECK: when greater(x@<t:UInt>, y@<t:UInt>)@<t:UInt> :
+ when gt(x, y) :
+ ;CHECK: when gt(x@<t:UInt>, y@<t:UInt>)@<t:UInt> :
inst s of subtracter
- ;CHECK: inst s of subtracter@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt(1)>}>
+ ;CHECK: inst s of subtracter@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt>}>
s.x := x
s.y := y
x := s.z
- ;CHECK: s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt(1)>}>.reset@<t:UInt(1)> := reset@<t:UInt(1)>
- ;CHECK: s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt(1)>}>.x@<t:UInt> := x@<t:UInt>
- ;CHECK: s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt(1)>}>.y@<t:UInt> := y@<t:UInt>
- ;CHECK: x@<t:UInt> := s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt(1)>}>.z@<t:UInt>
+ ;CHECK: s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt>}>.reset@<t:UInt> := reset@<t:UInt>
+ ;CHECK: s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt>}>.x@<t:UInt> := x@<t:UInt>
+ ;CHECK: s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt>}>.y@<t:UInt> := y@<t:UInt>
+ ;CHECK: x@<t:UInt> := s@<t:{input x : UInt@<t:UInt>, input y : UInt@<t:UInt>, output z : UInt@<t:UInt>, input reset : UInt(1)@<t:UInt>}>.z@<t:UInt>
else :
inst s2 of subtracter
s2.x := x
@@ -39,7 +39,7 @@ circuit top :
x := a
y := b
v := equal(v, UInt(0))
- ;CHECK: v@<t:UInt(1)> := equal(v@<t:UInt(1)>, UInt(0))@<t:UInt>
+ ;CHECK: v@<t:UInt> := equal(v@<t:UInt>, UInt(0))@<t:UInt>
z := x
module top :
input a : UInt(16)
diff --git a/test/passes/infer-types/primops.fir b/test/passes/infer-types/primops.fir
index 2a29efbf..7e7342ae 100644
--- a/test/passes/infer-types/primops.fir
+++ b/test/passes/infer-types/primops.fir
@@ -7,110 +7,122 @@ circuit top :
wire b : UInt(8)
wire c : SInt(16)
wire d : SInt(8)
+ wire e : UInt(1)
- ;add
- module add :
- node w = adduu(a,b) ;CHECK: node w = adduu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = addus(a,d) ;CHECK: node x = addus(a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = addsu(c,b) ;CHECK: node y = addsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = addss(c,d) ;CHECK: node z = addss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;sub
- module sub :
- node w = subuu(a,b) ;CHECK: node w = subuu(a@<t:UInt>,b@<t:UInt>)@<t:SInt>
- node x = subus(a,d) ;CHECK: node x = subus(a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = subsu(c,b) ;CHECK: node y = subsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = subss(c,d) ;CHECK: node z = subss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;mul
- module mul :
- node w = muluu(a,b) ;CHECK: node w = muluu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = mulus(a,d) ;CHECK: node x = mulus(a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = mulsu(c,b) ;CHECK: node y = mulsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = mulss(c,d) ;CHECK: node z = mulss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;div
- module div :
- node w = divuu(a,b) ;CHECK: node w = divuu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = divus(a,d) ;CHECK: node x = divus(a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = divsu(c,b) ;CHECK: node y = divsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = divss(c,d) ;CHECK: node z = divss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;mod
- module mod :
- node w = moduu(a,b) ;CHECK: node w = moduu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = modus(a,d) ;CHECK: node x = modus(a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = modsu(c,b) ;CHECK: node y = modsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = modss(c,d) ;CHECK: node z = modss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;rem
- module rem :
- node w = remuu(a,b) ;CHECK: node w = remuu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = remus(a,d) ;CHECK: node x = remus(a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = remsu(c,b) ;CHECK: node y = remsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = remss(c,d) ;CHECK: node z = remss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;add-mod
- module add-mod :
- node w = add-moduu(a,b) ;CHECK: node w = add-moduu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = add-modus(a,d) ;CHECK: node x = add-modus(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = add-modsu(c,b) ;CHECK: node y = add-modsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = add-modss(c,d) ;CHECK: node z = add-modss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;sub-mod
- module sub-mod :
- node w = sub-moduu(a,b) ;CHECK: node w = sub-moduu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = sub-modus(a,d) ;CHECK: node x = sub-modus(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = sub-modsu(c,b) ;CHECK: node y = sub-modsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = sub-modss(c,d) ;CHECK: node z = sub-modss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;lt
- module lt :
- node w = ltuu(a,b) ;CHECK: node w = ltuu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = ltus(a,d) ;CHECK: node x = ltus(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = ltsu(c,b) ;CHECK: node y = ltsu(c@<t:SInt>,b@<t:UInt>)@<t:UInt>
- node z = ltss(c,d) ;CHECK: node z = ltss(c@<t:SInt>,d@<t:SInt>)@<t:UInt>
- ;leq
- module leq :
- node w = lequu(a,b) ;CHECK: node w = lequu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = lequs(a,d) ;CHECK: node x = lequs(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = leqsu(c,b) ;CHECK: node y = leqsu(c@<t:SInt>,b@<t:UInt>)@<t:UInt>
- node z = leqss(c,d) ;CHECK: node z = leqss(c@<t:SInt>,d@<t:SInt>)@<t:UInt>
- ;gt
- module gt :
- node w = gtuu(a,b) ;CHECK: node w = gtuu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = gtus(a,d) ;CHECK: node x = gtus(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = gtsu(c,b) ;CHECK: node y = gtsu(c@<t:SInt>,b@<t:UInt>)@<t:UInt>
- node z = gtss(c,d) ;CHECK: node z = gtss(c@<t:SInt>,d@<t:SInt>)@<t:UInt>
- ;geq
- module geq :
- node w = gequu(a,b) ;CHECK: node w = gequu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = gequs(a,d) ;CHECK: node x = gequs(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = geqsu(c,b) ;CHECK: node y = geqsu(c@<t:SInt>,b@<t:UInt>)@<t:UInt>
- node z = geqss(c,d) ;CHECK: node z = geqss(c@<t:SInt>,d@<t:SInt>)@<t:UInt>
- ;pad
- module pad :
- node w = paduu(a,b) ;CHECK: node w = paduu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = padus(a,d) ;CHECK: node x = padus(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = padsu(c,b) ;CHECK: node y = padsu(c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = padss(c,d) ;CHECK: node z = padss(c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;and
- module and :
- node w = and(a,b) ;CHECK: node w = and(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- module or :
- node w = or(a,b) ;CHECK: node w = or(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- module xor :
- node w = xor(a,b) ;CHECK: node w = xor(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- ;concat
- node w = concat(a,b) ;CHECK: node w = concat(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- ;equal
- node w = equaluu(a,b) ;CHECK: node w = equaluu(a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = equalus(a,d) ;CHECK: node x = equalus(a@<t:UInt>,d@<t:SInt>)@<t:UInt>
- node y = equalsu(c,b) ;CHECK: node y = equalsu(c@<t:SInt>,b@<t:UInt>)@<t:UInt>
- node z = equalss(c,d) ;CHECK: node z = equalss(c@<t:SInt>,d@<t:SInt>)@<t:UInt>
- ;mux
- node w = muxuu(e,a,b) ;CHECK: node w = muxuu(e@<t:UInt>,a@<t:UInt>,b@<t:UInt>)@<t:UInt>
- node x = muxus(e,a,d) ;CHECK: node x = muxus(e@<t:UInt>,a@<t:UInt>,d@<t:SInt>)@<t:SInt>
- node y = muxsu(e,c,b) ;CHECK: node y = muxsu(e@<t:UInt>,c@<t:SInt>,b@<t:UInt>)@<t:SInt>
- node z = muxss(e,c,d) ;CHECK: node z = muxss(e@<t:UInt>,c@<t:SInt>,d@<t:SInt>)@<t:SInt>
- ;shl
- ;shr
- ;bit
- ;bits
-
-
-
-
+ node vadd = add(a, c) ;CHECK: node vadd = add(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wadd-uu = add-uu(a, b) ;CHECK: node wadd-uu = add-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xadd-us = add-us(a, d) ;CHECK: node xadd-us = add-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node yadd-su = add-su(c, b) ;CHECK: node yadd-su = add-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zadd-ss = add-ss(c, d) ;CHECK: node zadd-ss = add-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vsub = sub(a, c) ;CHECK: node vsub = sub(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wsub-uu = sub-uu(a, b) ;CHECK: node wsub-uu = sub-uu(a@<t:UInt>, b@<t:UInt>)@<t:SInt>
+ node xsub-us = sub-us(a, d) ;CHECK: node xsub-us = sub-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node ysub-su = sub-su(c, b) ;CHECK: node ysub-su = sub-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zsub-ss = sub-ss(c, d) ;CHECK: node zsub-ss = sub-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vmul = mul(a, c) ;CHECK: node vmul = mul(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wmul-uu = mul-uu(a, b) ;CHECK: node wmul-uu = mul-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xmul-us = mul-us(a, d) ;CHECK: node xmul-us = mul-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node ymul-su = mul-su(c, b) ;CHECK: node ymul-su = mul-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zmul-ss = mul-ss(c, d) ;CHECK: node zmul-ss = mul-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vdiv = div(a, c) ;CHECK: node vdiv = div(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wdiv-uu = div-uu(a, b) ;CHECK: node wdiv-uu = div-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xdiv-us = div-us(a, d) ;CHECK: node xdiv-us = div-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node ydiv-su = div-su(c, b) ;CHECK: node ydiv-su = div-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zdiv-ss = div-ss(c, d) ;CHECK: node zdiv-ss = div-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vmod = mod(a, c) ;CHECK: node vmod = mod(a@<t:UInt>, c@<t:SInt>)@<t:UInt>
+ node wmod-uu = mod-uu(a, b) ;CHECK: node wmod-uu = mod-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xmod-us = mod-us(a, d) ;CHECK: node xmod-us = mod-us(a@<t:UInt>, d@<t:SInt>)@<t:UInt>
+ node ymod-su = mod-su(c, b) ;CHECK: node ymod-su = mod-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zmod-ss = mod-ss(c, d) ;CHECK: node zmod-ss = mod-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vquo = quo(a, c) ;CHECK: node vquo = quo(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wquo-uu = quo-uu(a, b) ;CHECK: node wquo-uu = quo-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xquo-us = quo-us(a, d) ;CHECK: node xquo-us = quo-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node yquo-su = quo-su(c, b) ;CHECK: node yquo-su = quo-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zquo-ss = quo-ss(c, d) ;CHECK: node zquo-ss = quo-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vrem = rem(a, c) ;CHECK: node vrem = rem(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wrem-uu = rem-uu(a, b) ;CHECK: node wrem-uu = rem-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xrem-us = rem-us(a, d) ;CHECK: node xrem-us = rem-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node yrem-su = rem-su(c, b) ;CHECK: node yrem-su = rem-su(c@<t:SInt>, b@<t:UInt>)@<t:UInt>
+ node zrem-ss = rem-ss(c, d) ;CHECK: node zrem-ss = rem-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vadd-wrap = add-wrap(a, c) ;CHECK: node vadd-wrap = add-wrap(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wadd-wrap-uu = add-wrap-uu(a, b) ;CHECK: node wadd-wrap-uu = add-wrap-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xadd-wrap-us = add-wrap-us(a, d) ;CHECK: node xadd-wrap-us = add-wrap-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node yadd-wrap-su = add-wrap-su(c, b) ;CHECK: node yadd-wrap-su = add-wrap-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zadd-wrap-ss = add-wrap-ss(c, d) ;CHECK: node zadd-wrap-ss = add-wrap-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vsub-wrap = sub-wrap(a, c) ;CHECK: node vsub-wrap = sub-wrap(a@<t:UInt>, c@<t:SInt>)@<t:SInt>
+ node wsub-wrap-uu = sub-wrap-uu(a, b) ;CHECK: node wsub-wrap-uu = sub-wrap-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xsub-wrap-us = sub-wrap-us(a, d) ;CHECK: node xsub-wrap-us = sub-wrap-us(a@<t:UInt>, d@<t:SInt>)@<t:SInt>
+ node ysub-wrap-su = sub-wrap-su(c, b) ;CHECK: node ysub-wrap-su = sub-wrap-su(c@<t:SInt>, b@<t:UInt>)@<t:SInt>
+ node zsub-wrap-ss = sub-wrap-ss(c, d) ;CHECK: node zsub-wrap-ss = sub-wrap-ss(c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vlt = lt(a, c) ;CHECK: node vlt = lt(a@<t:UInt>, c@<t:SInt>)@<t:UInt>
+ node wlt-uu = lt-uu(a, b) ;CHECK: node wlt-uu = lt-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xlt-us = lt-us(a, d) ;CHECK: node xlt-us = lt-us(a@<t:UInt>, d@<t:SInt>)@<t:UInt>
+ node ylt-su = lt-su(c, b) ;CHECK: node ylt-su = lt-su(c@<t:SInt>, b@<t:UInt>)@<t:UInt>
+ node zlt-ss = lt-ss(c, d) ;CHECK: node zlt-ss = lt-ss(c@<t:SInt>, d@<t:SInt>)@<t:UInt>
+
+ node vleq = leq(a, c) ;CHECK: node vleq = leq(a@<t:UInt>, c@<t:SInt>)@<t:UInt>
+ node wleq-uu = leq-uu(a, b) ;CHECK: node wleq-uu = leq-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xleq-us = leq-us(a, d) ;CHECK: node xleq-us = leq-us(a@<t:UInt>, d@<t:SInt>)@<t:UInt>
+ node yleq-su = leq-su(c, b) ;CHECK: node yleq-su = leq-su(c@<t:SInt>, b@<t:UInt>)@<t:UInt>
+ node zleq-ss = leq-ss(c, d) ;CHECK: node zleq-ss = leq-ss(c@<t:SInt>, d@<t:SInt>)@<t:UInt>
+
+ node vgt = gt(a, c) ;CHECK: node vgt = gt(a@<t:UInt>, c@<t:SInt>)@<t:UInt>
+ node wgt-uu = gt-uu(a, b) ;CHECK: node wgt-uu = gt-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xgt-us = gt-us(a, d) ;CHECK: node xgt-us = gt-us(a@<t:UInt>, d@<t:SInt>)@<t:UInt>
+ node ygt-su = gt-su(c, b) ;CHECK: node ygt-su = gt-su(c@<t:SInt>, b@<t:UInt>)@<t:UInt>
+ node zgt-ss = gt-ss(c, d) ;CHECK: node zgt-ss = gt-ss(c@<t:SInt>, d@<t:SInt>)@<t:UInt>
+
+ node vgeq = geq(a, c) ;CHECK: node vgeq = geq(a@<t:UInt>, c@<t:SInt>)@<t:UInt>
+ node wgeq-uu = geq-uu(a, b) ;CHECK: node wgeq-uu = geq-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xgeq-us = geq-us(a, d) ;CHECK: node xgeq-us = geq-us(a@<t:UInt>, d@<t:SInt>)@<t:UInt>
+ node ygeq-su = geq-su(c, b) ;CHECK: node ygeq-su = geq-su(c@<t:SInt>, b@<t:UInt>)@<t:UInt>
+ node zgeq-ss = geq-ss(c, d) ;CHECK: node zgeq-ss = geq-ss(c@<t:SInt>, d@<t:SInt>)@<t:UInt>
+
+ node vequal = equal(a, b) ;CHECK: node vequal = equal(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node wequal-uu = equal-uu(a, b) ;CHECK: node wequal-uu = equal-uu(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node zequal-ss = equal-ss(c, d) ;CHECK: node zequal-ss = equal-ss(c@<t:SInt>, d@<t:SInt>)@<t:UInt>
+
+ node vmux = mux(e, a, b) ;CHECK: node vmux = mux(e@<t:UInt>, a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node wmux-uu = mux-uu(e, a, b) ;CHECK: node wmux-uu = mux-uu(e@<t:UInt>, a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node zmux-ss = mux-ss(e, c, d) ;CHECK: node zmux-ss = mux-ss(e@<t:UInt>, c@<t:SInt>, d@<t:SInt>)@<t:SInt>
+
+ node vpad = pad(a, 10) ;CHECK: node vpad = pad(a@<t:UInt>, 10)@<t:UInt>
+ node wpad-u = pad-u(a, 10) ;CHECK: node wpad-u = pad-u(a@<t:UInt>, 10)@<t:UInt>
+ node zpad-s = pad-s(c, 10) ;CHECK: node zpad-s = pad-s(c@<t:SInt>, 10)@<t:SInt>
+
+ node vas-UInt = as-UInt(d) ;CHECK: node vas-UInt = as-UInt(d@<t:SInt>)@<t:UInt>
+ node was-UInt-u = as-UInt-u(a) ;CHECK: node was-UInt-u = as-UInt-u(a@<t:UInt>)@<t:UInt>
+ node zas-UInt-s = as-UInt-s(c) ;CHECK: node zas-UInt-s = as-UInt-s(c@<t:SInt>)@<t:UInt>
+
+ node vas-SInt = as-SInt(a) ;CHECK: node vas-SInt = as-SInt(a@<t:UInt>)@<t:SInt>
+ node was-SInt-u = as-SInt-u(a) ;CHECK: node was-SInt-u = as-SInt-u(a@<t:UInt>)@<t:SInt>
+ node zas-SInt-s = as-SInt-s(c) ;CHECK: node zas-SInt-s = as-SInt-s(c@<t:SInt>)@<t:SInt>
+
+ node vshl = shl(a, 10) ;CHECK: node vshl = shl(a@<t:UInt>, 10)@<t:UInt>
+ node wshl-u = shl-u(a, 10) ;CHECK: node wshl-u = shl-u(a@<t:UInt>, 10)@<t:UInt>
+ node zshl-s = shl-s(c, 10) ;CHECK: node zshl-s = shl-s(c@<t:SInt>, 10)@<t:SInt>
+
+ node vshr = shr(a, 10) ;CHECK: node vshr = shr(a@<t:UInt>, 10)@<t:UInt>
+ node wshr-u = shr-u(a, 10) ;CHECK: node wshr-u = shr-u(a@<t:UInt>, 10)@<t:UInt>
+ node zshr-s = shr-s(c, 10) ;CHECK: node zshr-s = shr-s(c@<t:SInt>, 10)@<t:SInt>
+
+ node vconvert = convert(a) ;CHECK: node vconvert = convert(a@<t:UInt>)@<t:SInt>
+ node wconvert-u = convert-u(a) ;CHECK: node wconvert-u = convert-u(a@<t:UInt>)@<t:SInt>
+ node zconvert-s = convert-s(c) ;CHECK: node zconvert-s = convert-s(c@<t:SInt>)@<t:SInt>
+
+ node uand = bit-and(a, b) ;CHECK: node uand = bit-and(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node vor = bit-or(a, b) ;CHECK: node vor = bit-or(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node wxor = bit-xor(a, b) ;CHECK: node wxor = bit-xor(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node xconcat = concat(a, b) ;CHECK: node xconcat = concat(a@<t:UInt>, b@<t:UInt>)@<t:UInt>
+ node ybit = bit(a, 0) ;CHECK: node ybit = bit(a@<t:UInt>, 0)@<t:UInt>
+ node zbits = bits(a, 2, 0) ;CHECK: node zbits = bits(a@<t:UInt>, 2, 0)@<t:UInt>
;CHECK: Finished Infer Types
diff --git a/test/passes/initialize-register/when.fir b/test/passes/initialize-register/when.fir
index 4e2bef79..4e0690d8 100644
--- a/test/passes/initialize-register/when.fir
+++ b/test/passes/initialize-register/when.fir
@@ -6,7 +6,7 @@
input a : UInt(16)
input b : UInt(16)
output z : UInt
- when greater(1, 2) :
+ when gt(1, 2) :
reg r1: UInt
r1.init := UInt(12)
; CHECK: wire [[R1:gen[0-9]*]] : UInt
diff --git a/test/passes/resolve-kinds/gcd.fir b/test/passes/resolve-kinds/gcd.fir
index b06da6c5..f4ad0e05 100644
--- a/test/passes/resolve-kinds/gcd.fir
+++ b/test/passes/resolve-kinds/gcd.fir
@@ -6,8 +6,8 @@ circuit top :
input x : UInt
input y : UInt
output z : UInt
- z := sub-mod(x, y)
- ;CHECK: z@<k:port> := sub-mod(x@<k:port>, y@<k:port>)
+ z := sub-wrap(x, y)
+ ;CHECK: z@<k:port> := sub-wrap(x@<k:port>, y@<k:port>)
module gcd :
input a : UInt(16)
input b : UInt(16)
@@ -18,7 +18,7 @@ circuit top :
reg y : UInt
x.init := UInt(0)
y.init := UInt(42)
- when greater(x, y) :
+ when gt(x, y) :
inst s of subtracter
s.x := x
;CHECK: s@<k:inst>.x := x@<k:reg>
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-09 09:10:29 +0000