diff options
Diffstat (limited to 'test/passes')
| -rw-r--r-- | test/passes/expand-whens/scoped-reg.fir | 12 | ||||
| -rw-r--r-- | test/passes/lower-to-ground/test.fir | 13 |
2 files changed, 25 insertions, 0 deletions
diff --git a/test/passes/expand-whens/scoped-reg.fir b/test/passes/expand-whens/scoped-reg.fir new file mode 100644 index 00000000..20c91386 --- /dev/null +++ b/test/passes/expand-whens/scoped-reg.fir @@ -0,0 +1,12 @@ +; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p c | tee %s.out | FileCheck %s +; CHECK: Expand Whens +circuit top : + module A : + wire p : UInt + when p : + reg r : UInt + on-reset r := UInt(10) + r := UInt(20) +; CHECK: r := Register(mux-uu(reset, UInt(10), UInt(20)), mux-uu(reset, UInt(1), p)) +; CHECK: Finished Expand Whens + diff --git a/test/passes/lower-to-ground/test.fir b/test/passes/lower-to-ground/test.fir new file mode 100644 index 00000000..fb951bff --- /dev/null +++ b/test/passes/lower-to-ground/test.fir @@ -0,0 +1,13 @@ +; RUN: firrtl -i %s -o %s.flo -x X -p cd | tee %s.out | FileCheck %s +; CHECK: Done! + +circuit Top : + module Queue : + output out : {valid : UInt<1>, flip ready : UInt<1>} + module Top : + output this : {out : {valid : UInt<1>, flip ready : UInt<1>}} + inst queue of Queue + this.out := queue.out + wire w : { x : UInt, flip y : UInt} + wire a : UInt + w.y := a |