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Diffstat (limited to 'test/passes/resolve-kinds/gcd.fir')
-rw-r--r--test/passes/resolve-kinds/gcd.fir10
1 files changed, 6 insertions, 4 deletions
diff --git a/test/passes/resolve-kinds/gcd.fir b/test/passes/resolve-kinds/gcd.fir
index bb978972..cdc8c337 100644
--- a/test/passes/resolve-kinds/gcd.fir
+++ b/test/passes/resolve-kinds/gcd.fir
@@ -6,8 +6,8 @@ circuit top :
input x : UInt
input y : UInt
output z : UInt
- z <= subw(x, y)
- ;CHECK: z@<k:port> <= subw(x@<k:port>, y@<k:port>)
+ z <= tail(sub(x, y),1)
+ ;CHECK: z@<k:port> <= tail(sub(x@<k:port>, y@<k:port>)@<k:exp>, 1)@<k:exp>
module gcd :
input clk : Clock
input reset : UInt<1>
@@ -16,8 +16,10 @@ circuit top :
input e : UInt<1>
output z : UInt<16>
output v : UInt<1>
- reg x : UInt,clk,reset,UInt(0)
- reg y : UInt,clk,reset,UInt(42)
+ reg x : UInt,clk with :
+ reset => (reset,UInt(0))
+ reg y : UInt,clk with :
+ reset => (reset,UInt(42))
when gt(x, y) :
inst s of subtracter
s.x <= x