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-rw-r--r--test/passes/make-explicit-reset/mix-reset.fir9
1 files changed, 5 insertions, 4 deletions
diff --git a/test/passes/make-explicit-reset/mix-reset.fir b/test/passes/make-explicit-reset/mix-reset.fir
index 23a1232a..c6487c8d 100644
--- a/test/passes/make-explicit-reset/mix-reset.fir
+++ b/test/passes/make-explicit-reset/mix-reset.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl %s abc | tee %s.out | FileCheck %s
+; RUN: firrtl %s abc c | tee %s.out | FileCheck %s
; CHECK: Make Explicit Reset
circuit top :
@@ -7,14 +7,14 @@ circuit top :
input x : UInt(16)
output y : UInt(16)
inst b of B
- ;CHECK: inst:b.reset := port:reset
+ ;CHECK: b.reset := reset
module B :
input reset : UInt(1)
;CHECK: input reset : UInt(1)
input x : UInt(16)
output y : UInt(16)
inst c of C
- ;CHECK: inst:c.reset := port:reset
+ ;CHECK: c.reset := reset
module C :
;CHECK: input reset : UInt(1)
input a : UInt(16)
@@ -25,4 +25,5 @@ circuit top :
input b : UInt(16)
output z : UInt
inst a of A
- ;CHECK: inst:a.reset := port:reset
+ ;CHECK: a.reset := reset
+;CHECK: Finished Make Explicit Reset