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-rw-r--r--test/passes/lower-to-ground/nested-vec.fir30
1 files changed, 15 insertions, 15 deletions
diff --git a/test/passes/lower-to-ground/nested-vec.fir b/test/passes/lower-to-ground/nested-vec.fir
index 1a6ba2e8..c39850f4 100644
--- a/test/passes/lower-to-ground/nested-vec.fir
+++ b/test/passes/lower-to-ground/nested-vec.fir
@@ -8,29 +8,29 @@ circuit top :
wire k : { x : UInt<32>, y : UInt<32> }
wire a : { x : UInt<32>, flip y : UInt<32> }[2]
- ; CHECK: wire a_0_x : UInt<32>
- ; CHECK: wire a_0_y : UInt<32>
- ; CHECK: wire a_1_x : UInt<32>
- ; CHECK: wire a_1_y : UInt<32>
+ ; CHECK: wire a$0$x : UInt<32>
+ ; CHECK: wire a$0$y : UInt<32>
+ ; CHECK: wire a$1$x : UInt<32>
+ ; CHECK: wire a$1$y : UInt<32>
accessor b = a[i]
- ; CHECK: wire b_x : UInt<32>
- ; CHECK: wire b_y : UInt<32>
- ; CHECK: b_x := (a_0_x a_1_x)[i]
- ; CHECK: (a_0_y a_1_y)[i] := b_y
+ ; CHECK: wire b$x : UInt<32>
+ ; CHECK: wire b$y : UInt<32>
+ ; CHECK: b$x := (a$0$x a$1$x)[i]
+ ; CHECK: (a$0$y a$1$y)[i] := b$y
j := b
- mem m : { x : UInt<32>, y : UInt<32> }[2]
- ; CHECK: mem m_x : UInt<32>[2]
- ; CHECK: mem m_y : UInt<32>[2]
+ cmem m : { x : UInt<32>, y : UInt<32> }[2]
+ ; CHECK: cmem m$x : UInt<32>[2]
+ ; CHECK: cmem m$y : UInt<32>[2]
accessor c = m[i] ; MALE
- ; CHECK: accessor c_x = m_x[i]
- ; CHECK: accessor c_y = m_y[i]
+ ; CHECK: accessor c$x = m$x[i]
+ ; CHECK: accessor c$y = m$y[i]
c := k
- ; CHECK: c_x := k_x
- ; CHECK: c_y := k_y
+ ; CHECK: c$x := k$x
+ ; CHECK: c$y := k$y
; CHECK: Finished Lower To Ground