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-rw-r--r--test/passes/lower-to-ground/bundle-vecs.fir18
1 files changed, 9 insertions, 9 deletions
diff --git a/test/passes/lower-to-ground/bundle-vecs.fir b/test/passes/lower-to-ground/bundle-vecs.fir
index 77de74db..a4ba1eab 100644
--- a/test/passes/lower-to-ground/bundle-vecs.fir
+++ b/test/passes/lower-to-ground/bundle-vecs.fir
@@ -6,22 +6,22 @@ circuit top :
wire i : UInt
wire j : UInt
- wire a : { x : UInt(32), flip y : UInt(32) }[2]
- ; CHECK: wire a$0$x : UInt(32)
- ; CHECK: wire a$0$y : UInt(32)
- ; CHECK: wire a$1$x : UInt(32)
- ; CHECK: wire a$1$y : UInt(32)
+ wire a : { x : UInt<32>, flip y : UInt<32> }[2]
+ ; CHECK: wire a$0$x : UInt<32>
+ ; CHECK: wire a$0$y : UInt<32>
+ ; CHECK: wire a$1$x : UInt<32>
+ ; CHECK: wire a$1$y : UInt<32>
accessor b = a[i]
- ; CHECK: wire b$x : UInt(32)
- ; CHECK: wire b$y : UInt(32)
+ ; CHECK: wire b$x : UInt<32>
+ ; CHECK: wire b$y : UInt<32>
; CHECK: b$x := (a$0$x a$1$x)[i]
; CHECK: (a$0$y a$1$y)[i] := b$y
j := b
accessor c = a[i]
- ; CHECK: wire c$x : UInt(32)
- ; CHECK: wire c$y : UInt(32)
+ ; CHECK: wire c$x : UInt<32>
+ ; CHECK: wire c$y : UInt<32>
; CHECK: (a$0$x a$1$x)[i] := c$x
; CHECK: c$y := (a$0$y a$1$y)[i]
c := j