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-rw-r--r--test/passes/lower-to-ground/bundle-vecs.fir24
1 files changed, 12 insertions, 12 deletions
diff --git a/test/passes/lower-to-ground/bundle-vecs.fir b/test/passes/lower-to-ground/bundle-vecs.fir
index ebf81093..fb1c8320 100644
--- a/test/passes/lower-to-ground/bundle-vecs.fir
+++ b/test/passes/lower-to-ground/bundle-vecs.fir
@@ -7,23 +7,23 @@ circuit top :
wire j : { x : UInt<32>, flip y : UInt<32> }
wire a : { x : UInt<32>, flip y : UInt<32> }[2]
- ; CHECK: wire a_0_x : UInt<32>
- ; CHECK: wire a_0_y : UInt<32>
- ; CHECK: wire a_1_x : UInt<32>
- ; CHECK: wire a_1_y : UInt<32>
+ ; CHECK: wire a{{[_$]+}}0{{[_$]+}}x : UInt<32>
+ ; CHECK: wire a{{[_$]+}}0{{[_$]+}}y : UInt<32>
+ ; CHECK: wire a{{[_$]+}}1{{[_$]+}}x : UInt<32>
+ ; CHECK: wire a{{[_$]+}}1{{[_$]+}}y : UInt<32>
infer accessor b = a[i]
- ; CHECK: wire b_x : UInt<32>
- ; CHECK: wire b_y : UInt<32>
- ; CHECK: b_x := (a_0_x a_1_x)[i]
- ; CHECK: (a_0_y a_1_y)[i] := b_y
+ ; CHECK: wire b{{[_$]+}}x : UInt<32>
+ ; CHECK: wire b{{[_$]+}}y : UInt<32>
+ ; CHECK: b{{[_$]+}}x := (a{{[_$]+}}0{{[_$]+}}x a{{[_$]+}}1{{[_$]+}}x)[i]
+ ; CHECK: (a{{[_$]+}}0{{[_$]+}}y a{{[_$]+}}1{{[_$]+}}y)[i] := b{{[_$]+}}y
j := b
infer accessor c = a[i]
- ; CHECK: wire c_x : UInt<32>
- ; CHECK: wire c_y : UInt<32>
- ; CHECK: (a_0_x a_1_x)[i] := c_x
- ; CHECK: c_y := (a_0_y a_1_y)[i]
+ ; CHECK: wire c{{[_$]+}}x : UInt<32>
+ ; CHECK: wire c{{[_$]+}}y : UInt<32>
+ ; CHECK: (a{{[_$]+}}0{{[_$]+}}x a{{[_$]+}}1{{[_$]+}}x)[i] := c{{[_$]+}}x
+ ; CHECK: c{{[_$]+}}y := (a{{[_$]+}}0{{[_$]+}}y a{{[_$]+}}1{{[_$]+}}y)[i]
c := j