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Diffstat (limited to 'test/passes/jacktest/testlower.fir')
| -rw-r--r-- | test/passes/jacktest/testlower.fir | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/test/passes/jacktest/testlower.fir b/test/passes/jacktest/testlower.fir index c338d094..7b096ff3 100644 --- a/test/passes/jacktest/testlower.fir +++ b/test/passes/jacktest/testlower.fir @@ -4,17 +4,17 @@ circuit BundleWire : module BundleWire : - input in : { y : UInt(32), x : UInt(32) } - output outs : { y : UInt(32), x : UInt(32) }[4] + input in : { y : UInt<32>, x : UInt<32> } + output outs : { y : UInt<32>, x : UInt<32> }[4] - wire coords : { y : UInt(32), x : UInt(32) }[4] - coords.0 := in - outs.0 := coords.0 - coords.1 := in - outs.1 := coords.1 - coords.2 := in - outs.2 := coords.2 - coords.3 := in - outs.3 := coords.3 + wire coords : { y : UInt<32>, x : UInt<32> }[4] + coords[0] := in + outs[0] := coords[0] + coords[1] := in + outs[1] := coords[1] + coords[2] := in + outs[2] := coords[2] + coords[3] := in + outs[3] := coords[3] ; CHECK: Finished Expand Whens |