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-rw-r--r--test/passes/jacktest/Counter.fir5
1 files changed, 3 insertions, 2 deletions
diff --git a/test/passes/jacktest/Counter.fir b/test/passes/jacktest/Counter.fir
index 4e23ba26..266c1849 100644
--- a/test/passes/jacktest/Counter.fir
+++ b/test/passes/jacktest/Counter.fir
@@ -8,9 +8,10 @@ circuit Counter :
output tot : UInt<8>
input amt : UInt<4>
- reg T_13 : UInt<8>,clk,reset,UInt<8>(0)
+ reg T_13 : UInt<8>,clk with :
+ reset => (reset,UInt<8>(0))
when inc :
- node T_14 = addw(T_13, amt)
+ node T_14 = tail(add(T_13, amt),1)
node T_15 = gt(T_14, UInt<8>(255))
node T_16 = mux(T_15, UInt<1>(0), T_14)
T_13 <= T_16