aboutsummaryrefslogtreecommitdiff
path: root/test/passes/expand-whens/reg-dwoc.fir
diff options
context:
space:
mode:
Diffstat (limited to 'test/passes/expand-whens/reg-dwoc.fir')
-rw-r--r--test/passes/expand-whens/reg-dwoc.fir10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/passes/expand-whens/reg-dwoc.fir b/test/passes/expand-whens/reg-dwoc.fir
index ab6f4915..3bb9515e 100644
--- a/test/passes/expand-whens/reg-dwoc.fir
+++ b/test/passes/expand-whens/reg-dwoc.fir
@@ -7,17 +7,17 @@ circuit top :
p := UInt(1)
reg r : UInt,clk,reset
when p :
- on-reset r := UInt(10)
- r := UInt(20)
+ onreset r := UInt(1)
+ r := UInt(2)
; CHECK: Expand Whens
; CHECK: circuit top :
; CHECK: module top :
; CHECK: wire p : UInt
-; CHECK: reg r : UInt
-; CHECK: p := UInt(1)
-; CHECK: when p : r := mux(reset, UInt(10), UInt(20))
+; CHECK: reg r : UInt, clk, reset
+; CHECK: p := UInt("h00000001")
+; CHECK: when p : r := mux(reset, UInt("h00000001"), UInt("h00000002"))
; CHECK: Finished Expand Whens