diff options
Diffstat (limited to 'test/passes/expand-accessors/simple.fir')
| -rw-r--r-- | test/passes/expand-accessors/simple.fir | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/test/passes/expand-accessors/simple.fir b/test/passes/expand-accessors/simple.fir index 7e8a4dcd..b595fc4c 100644 --- a/test/passes/expand-accessors/simple.fir +++ b/test/passes/expand-accessors/simple.fir @@ -1,6 +1,6 @@ ; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s -;CHECK: Expand Accessors +;CHECK: Done! circuit top : module top : output o : UInt @@ -9,7 +9,8 @@ circuit top : m[0] <= UInt("h1") m[1] <= UInt("h1") i <= UInt("h1") - infer accessor a = m[i] ;CHECK: indexer a = (m$0 m$1)[i] : UInt<32> + wire a : UInt<32> + a <= m[i] o <= a |