diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/transforms/GroupComponents.scala | 9 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/transforms/GroupComponentsSpec.scala | 37 |
2 files changed, 45 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/transforms/GroupComponents.scala b/src/main/scala/firrtl/transforms/GroupComponents.scala index 805b534e..8c36bb6d 100644 --- a/src/main/scala/firrtl/transforms/GroupComponents.scala +++ b/src/main/scala/firrtl/transforms/GroupComponents.scala @@ -119,6 +119,11 @@ class GroupComponents extends firrtl.Transform { } } + // Unused nodes are not reachable from any group nor the root--add them to root group + for ((v, _) <- deps.getEdgeMap) { + reachableNodes.getOrElseUpdate(v, mutable.Set("")) + } + // Add nodes who are reached by a single group, to that group reachableNodes.foreach { case (node, membership) => if(membership.size == 1) { @@ -307,7 +312,9 @@ class GroupComponents extends firrtl.Transform { } def onStmt(stmt: Statement): Unit = stmt match { case w: WDefInstance => - case h: IsDeclaration => h map onExpr(WRef(h.name)) + case h: IsDeclaration => + bidirGraph.addVertex(h.name) + h map onExpr(WRef(h.name)) case Attach(_, exprs) => // Add edge between each expression exprs.tail map onExpr(getWRef(exprs.head)) case Connect(_, loc, expr) => diff --git a/src/test/scala/firrtlTests/transforms/GroupComponentsSpec.scala b/src/test/scala/firrtlTests/transforms/GroupComponentsSpec.scala index f51d44ae..c54e02e3 100644 --- a/src/test/scala/firrtlTests/transforms/GroupComponentsSpec.scala +++ b/src/test/scala/firrtlTests/transforms/GroupComponentsSpec.scala @@ -46,6 +46,43 @@ class GroupComponentsSpec extends LowTransformSpec { """.stripMargin execute(input, check, groups) } + "Grouping" should "work even when there are unused nodes" in { + val input = + s"""circuit $top : + | module $top : + | input in: UInt<16> + | output out: UInt<16> + | node n = UInt<16>("h0") + | wire w : UInt<16> + | wire a : UInt<16> + | wire b : UInt<16> + | a <= UInt<16>("h0") + | b <= a + | w <= in + | out <= w + """.stripMargin + val groups = Seq( + GroupAnnotation(Seq(topComp("w")), "Child", "inst", Some("_OUT"), Some("_IN")) + ) + val check = + s"""circuit Top : + | module $top : + | input in: UInt<16> + | output out: UInt<16> + | inst inst of Child + | node n = UInt<16>("h0") + | inst.in_IN <= in + | node a = UInt<16>("h0") + | node b = a + | out <= inst.w_OUT + | module Child : + | input in_IN : UInt<16> + | output w_OUT : UInt<16> + | node w = in_IN + | w_OUT <= w + """.stripMargin + execute(input, check, groups) + } "The two sets of instances" should "be grouped" in { val input = |