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Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/firrtlTests/stage/phases/AddCircuitSpec.scala | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/test/scala/firrtlTests/stage/phases/AddCircuitSpec.scala b/src/test/scala/firrtlTests/stage/phases/AddCircuitSpec.scala index a86c5f12..3620ed49 100644 --- a/src/test/scala/firrtlTests/stage/phases/AddCircuitSpec.scala +++ b/src/test/scala/firrtlTests/stage/phases/AddCircuitSpec.scala @@ -45,7 +45,9 @@ class AddCircuitSpec extends FlatSpec with Matchers { val (file, fileCircuit) = { val source = firrtlSource("foo") val fileName = "test_run_dir/AddCircuitSpec.fir" - val fw = new FileWriter(new File(fileName)) + val srcFile = new File(fileName) + srcFile.getParentFile.mkdirs() + val fw = new FileWriter(srcFile) fw.write(source) fw.close() (fileName, Parser.parse(source)) |